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CS49326 参数 Datasheet PDF下载

CS49326图片预览
型号: CS49326
PDF下载: 下载PDF文件 查看货源
内容描述: 多标准音频解码器系列 [Multi-Standard Audio Decoder Family]
分类和应用: 解码器
文件页数/大小: 86 页 / 1343 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS49300 Family DSP  
11.3. Output Data Hardware Configuration  
DAO Data Format Of  
AUDATA0, 1, 2 (or AUDATA0  
for Multichannel Modes)  
I2S 24-bit  
(Configuration of AUDATA3 as S/PDIF  
Hex  
The naming convention for the DAO configuration  
is as follows:  
B Value  
0
(default)  
Message  
0x80027F  
0xFC7FFF  
0x80027C  
0xF01F00  
0x80027D  
0xF01F00  
0x80027E  
0xF01F00  
0x80017F  
0x038000  
0x80017C  
0x000001  
0x80017D  
0x000001  
0x80017E  
0x000001  
0x80027F  
0xFC7FFF  
0x80027C  
0xF01F00  
0x80027D  
0xF01F00  
0x80027E  
0xF01F00  
0x80017F  
0x018000  
0x80027F  
0xFC7FFF  
OUTPUT A B C D E  
(IEC60958) or Digital Audio in the  
2
where the parameters are defined as:  
format of I S or Left Justified is  
covered in AN162 and AN163)  
A - DAO Mode (Master/Slave for LRCLK and  
SCLK)  
B - Data Format  
C - MCLK Frequency  
D - SCLK Frequency  
E - SCLK Polarity  
The following tables show the different values for  
each parameter as well as the hex message that  
needs to be sent. When creating the hardware  
configuration message, only one hex message  
should be sent per parameter.  
1
Left Justified 24-bit  
(Configuration of AUDATA3 as S/PDIF  
(IEC60958) or Digital Audio in the  
2
format of I S or Left Justified is  
covered in AN162 and AN163)  
DAO Modes (LRCLK &  
SCLK)  
MCLK - Slave  
Hex  
Message  
0x80017F  
0x400000  
A Value  
0
(default) SCLK - Slave  
LRCLK - Slave  
1
MCLK - Slave  
SCLK - Master  
LRCLK - Master  
MCLK - Master  
SCLK - Master  
LRCLK - Master  
0x80027F  
0xBFFFFF  
2
Multichannel (6 channel)  
20-bit Left Justified  
(SCLK must be at least 128Fs 0x80027C  
for this mode)  
(Configuration of AUDATA3 as S/PDIF  
2
0x80027F  
0xBFDFFF  
0xF00000  
0x80017C  
0x001300  
0x80027D  
0xF00000  
0x80017D  
0x001300  
0x80027E  
0xF00000  
0x80017E  
0x001300  
(IEC60958) or Digital Audio in the  
2
format of I S or Left Justified is  
Table 22. Output Clock Configuration  
(Parameter A)  
covered in AN162 and AN163)  
Table 23. Output Data Format Configuration  
(Parameter B)  
76  
DS339PP4  
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