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CS42426-DQZR 参数 Datasheet PDF下载

CS42426-DQZR图片预览
型号: CS42426-DQZR
PDF下载: 下载PDF文件 查看货源
内容描述: 114分贝192千赫6声道编解码器PLL [114 dB, 192 kHz 6-Ch Codec with PLL]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 73 页 / 1381 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS42426  
2. PIN DESCRIPTIONS  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
DAC_SDIN1  
DAC_SCLK  
DAC_LRCK  
VD  
1
2
3
4
5
6
7
8
9
48 GPO1  
47 GPO2  
46 GPO3  
45 GPO4  
DGND  
44 GPO5  
VLC  
43 GPO6  
SCL/CCLK  
SDA/CDOUT  
AD1/CDIN  
42 GPO7  
41 VA  
CS42426  
40 AGND  
39 LPFLT  
38 MUTEC  
37 AOUTA1-  
36 AOUTA1+  
35 AOUTB1+  
34 AOUTB1-  
33 AOUTA2-  
AD0/CS 10  
INT 11  
RST 12  
AINR- 13  
AINR+ 14  
AINL+ 15  
AINL- 16  
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  
Pin Name  
#
Pin Description  
1
64  
63  
DAC_SDIN1  
DAC_SDIN2  
DAC_SDIN3  
DAC Serial Audio Data Input (Input) - Input for two’s complement serial audio data.  
DAC Serial Clock (Input/Output) - Serial clock for the DAC serial audio interface.  
2
DAC_SCLK  
DAC Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on  
the DAC serial audio data line.  
3
DAC_LRCK  
4
51  
VD  
Digital Power (Input) - Positive power supply for the digital section.  
5
52  
DGND  
Digital Ground (Input) - Ground reference. Should be connected to digital ground.  
Control Port Power (Input) - Determines the required signal level for the control port.  
6
VLC  
Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up  
resistor to the logic interface voltage in I²C mode as shown in the Typical Connection Diagram.  
7
SCL/CCLK  
Serial Control Data (Input/Output) - SDA is a data I/O line in I²C mode and requires an external pull-up  
resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDOUT is the output  
data line for the control port interface in SPI mode.  
8
9
SDA/CDOUT  
AD1/CDIN  
Address Bit 1 (I²C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I²C mode; CDIN is  
the input data line for the control port interface in SPI mode.  
Address Bit 0 (I²C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode; CS  
is the chip select signal in SPI mode.  
10  
11  
AD0/CS  
INT  
Interrupt (Output) - The CS42426 will generate an interrupt condition as per the Interrupt Mask register.  
See “Interrupts” on page 37 for more details.  
16  
DS604F1