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CS42426-DQZR 参数 Datasheet PDF下载

CS42426-DQZR图片预览
型号: CS42426-DQZR
PDF下载: 下载PDF文件 查看货源
内容描述: 114分贝192千赫6声道编解码器PLL [114 dB, 192 kHz 6-Ch Codec with PLL]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 73 页 / 1381 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS42426  
DC ELECTRICAL CHARACTERISTICS  
(T = 25° C; AGND=DGND=0, all voltages with respect to ground; OMCK=12.288 MHz; Master Mode)  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Power Supply Current  
(Note 22)  
normal operation, VA = 5 V  
VD = 5 V  
VD = 3.3 V  
Interface current, VLC=5 V (Note 23)  
VLS=5 V  
IA  
ID  
ID  
ILC  
ILS  
Ipd  
-
-
-
-
-
-
75  
85  
51  
250  
13  
250  
-
-
-
-
-
-
mA  
mA  
mA  
µA  
mA  
µA  
power-down state (all supplies) (Note 24)  
Power Consumption  
VA=5 V, VD=VLS=VLC=3.3 V  
(Note 22)  
normal operation  
-
-
-
-
587  
1.25  
866  
650  
mW  
mW  
mW  
mW  
power-down (Note 24)  
normal operation  
power-down (Note 24)  
-
960  
-
VA=5 V, VD=VLS=VLC=5 V  
1.25  
Power Supply Rejection Ratio (Note 25)  
(1 kHz)  
(60 Hz)  
-
-
60  
40  
-
-
dB  
dB  
PSRR  
VQ Nominal Voltage  
VQ Output Impedance  
VQ Maximum allowable DC current  
-
-
-
2.7  
50  
0.01  
-
-
-
V
kΩ  
mA  
FILT+ Nominal Voltage  
FILT+ Output Impedance  
FILT+ Maximum allowable DC current  
-
-
-
5.0  
35  
0.01  
-
-
-
V
kΩ  
mA  
Notes:  
22. Current consumption increases with increasing FS and increasing OMCK. Max values are based on  
highest FS and highest OMCK. Variance between speed modes is negligible.  
23. I measured with no external loading on the SDA pin.  
LC  
24. Power-Down Mode is defined as RST pin = Low with all clock and data lines held static.  
25. Valid with the recommended capacitor values on FILT+ and VQ as shown in Figure 5.  
14  
DS604F1