CS42426
3. TYPICAL CONNECTION DIAGRAMS
+3.3 V to +5 V
+5 V
0.01 µF 0.1 µF
0.01 µF 0.1 µF
0.1 µF 0.01 µF
+
+
+
10 µF
10 µF
10 µF
0.1 µF 0.01 µF
+
10 µF
51
VD
41
VA
24
VA
4
VD
36
Analog Output Buffer 2
and
AOUTA1+
AOUTA1-
Optional
37
+3.3 V
to +5.0 V
CS8416
Receiver
48
Mute Circuit (optional)
GPO1
GPO2
GPO3
GPO4
GPO5
GPO6
GPO7
47
46
45
44
43
42
35
34
Analog Output Buffer 2
and
S/PDIF
AOUTB1+
AOUTB1-
RMCK
Mute Circuit (optional)
32
33
AOUTA2+
AOUTA2-
Analog Output Buffer 2
and
Mute Circuit (optional)
31
30
Analog Output Buffer 2
and
53
AOUTB2+
AOUTB2-
VLS
0.1 µF
Mute Circuit (optional)
59
OSC
OMCK
28
29
Analog Output Buffer 2
and
AOUTA3+
AOUTA3-
58
57
55
ADCIN1
ADCIN2
RMCK
CS5361
A/D Converter
CS5361
Mute Circuit (optional)
27
26
AOUTB3+
AOUTB3-
Analog Output Buffer 2
and
A/D Converter
Mute Circuit (optional)
CS42426
56
60
61
ADC_SDOUT
ADC_LRCK
ADC_SCLK
+VA
Digital Audio
Processor
Mute
Drive
(optional)
*
*
38
MUTEC
3
2
1
DAC_LRCK
DAC_SCLK
DAC_SDIN1
* Pull up or down as
required on startup if the
Mute Control is used.
15
16
14
13
64
63
AINL+
AINL-
DAC_SDIN2
DAC_SDIN3
Analog
Input
Buffer 1
2700 pF*
Left Analog Input
Right Analog Input
11
12
7
INT
AINR+
AINR-
Analog
2I7n0p0utpF*
Buffer 1
RST
Micro-
Controller
SCL/CCLK
SDA/CDOUT
8
9
AD1/CDIN
AD0/CS
10
17
18
VQ
+
**
**
6
FILT+
+
2 kΩ
2 kΩ
4.7 µF
0.1 µF
0.1 µF 100 µF
19
39
+1.8V
to +5V
REFGND
LPFLT
VLC
0.1 µF
RFILT 3
** Resistors are required for
I2C control port operation
AGND
25
AGND
40
DGND DGND
CFILT 3
CRIP 3
5
52
Connect DGND and AGND at single point near Codec
1. See the ADC Input Filter section in the Appendix.
2. See the DAC Output Filter section in the Appendix.
3. See the PLL Filter section in the Appendix.
Figure 5. Typical Connection Diagram
18
DS604F1
CIRRUS [ CIRRUS LOGIC ]
