CL-PD6710/’22
ISA–to–PC-Card Host Adapters
9.7.6
Extension Control 2 (CL-PD6722 only)
Register Name: Extension Control 2
Register Per: socket
Extended Index: 0Bh
Register Compatibility Type: ext.
Index: 2Fh
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Active-high
GPSTB
GPSTB on
IOW*
GPSTB on
IOR*
Totem-pole
GPSTB
Reserved
Reserved
RW:00
RW:00
RW:0
RW:0
RW:0
RW:0
Bit 5 — Active-high GPSTB
0
1
GPSTB ouputs are active-low.
GPSTB ouputs are active-high.
Bit 4 — GPSTB on IOW* (CL-PD6722 only)
0
1
A_GPSTB (CL-PD6722) pins are used as voltage sense.
A_GPSTB (CL-PD6722) pins are used to strobe I/O writes on SD[15:8].
Note that setting this bit forces the pull-ups on A_GPSTB (CL-PD6722) to be off, independent of
the setting of the Pull-Up Control bit (index 2Fh, extended index 03h, bit 5). See Section 9.7.5,
Chapter 12, and Chapter 13.
Bit 3 — GPSTB on IOR* (CL-PD6722 only)
0
1
B_GPSTB (CL-PD6722) pins (socket B) are used as voltage sense.
B_GPSTB (CL-PD6722) pins are used to strobe I/O reads on SD[15:8].
Note that setting this bit forces the pull-ups on B_GPSTB (CL-PD6722) to be off, independent of
the setting of the Pull-Up Control bit (index 6Fh, extended index 03h, bit 5). See Section 9.7.5,
Chapter 12, and Chapter 13.
Bit 2 — Totem-pole GPSTB
0
GPSTB ouputs are open-collector.
GPSTB ouputs are totem-pole.
1
When GPSTB outputs are totem-pole, their ‘high’ level is driven to the level of the +5V pin, instead
of high-impedance.
May 1997
71
PRELIMINARY DATA SHEET v3.1
EXTENSION REGISTERS
CIRRUS [ CIRRUS LOGIC ]
