CL-PD6710/’22
ISA–to–PC-Card Host Adapters
9.7.4
External Data (CL-PD6722 only, Socket A, Index 2Fh)
Register Name: External Data
Register Per: socket
Extended Index: 0Ah
Bit 4 Bit 3
Register Compatibility Type: ext.
Index: 2Fh only
Bit 7
Bit 6
Bit 5
Bit 2
Bit 1
Bit 0
External Data External Data External Data External Data External Data External Data External Data External Data
7
6
5
4
3
2
1
0
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
Bits 7:0 — External Data
This register is updated and accessed according to the setting of bits 3 and 4 of the Socket A
Extension Control 2 register (Index 2Fh, Extended Index 0Bh).
Table 9-2. Functions of Socket A External Data Register
Socket A Extension Control 2
Function of Socket A External Data Register
Bit 4: GPSTB
on IOW*
Bit 3: GPSTB
on IOR*
0
0
0
1
Scratchpad
External read port: A_GPSTB is a read buffer enable for external data on
SD[15:8]
External write port: A_GPSTB is a write latch enable for SD[15:8] to get
latched to an external register. Reads of Socket A External Data register pro-
duce the value written to the latch.
1
1
0
1
Reserved
NOTE: For software compatibility of external data access accross the Cirrus Logic PC Card host adapter product
line, the Socket A External Data register should only be used as a write port and not as a read port. Also
for compatibility, only the lower nibble of External Data should be accessed and the upper nibble should be
ignored.
Refer to Chapter 12 for more information on the use of the External Data register.
May 1997
69
PRELIMINARY DATA SHEET v3.1
EXTENSION REGISTERS