CL-PD6710/’22
ISA–to–PC-Card Host Adapters
7. I/O WINDOW MAPPING REGISTERS
The I/O windows must never include 3E0h and 3E1h.
7.1 I/O Window Control
Register Name: I/O Window Control
Index: 07h
Register Per: socket
Register Compatibility Type: 365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Timing
Register
Select 1
Timing
Register
Select 0
Compatibility Auto-Size I/O I/O Window 1
Compatibility Auto-Size I/O I/O Window 0
Bit
Window 1
RW:0
Size
Bit
Window 0
RW:0
Size
RW:0
RW:0
RW:0
RW:0
RW:0
RW:0
Bit 0 — I/O Window 0 Size
0
1
8-bit data path to I/O Window 0.
16-bit data path to I/O Window 0.
When bit 1 below is ‘0’, this bit determines the size of the data path to I/O Window 0. When bit 1
is ‘1’, this bit is ignored.
Bit 1 — Auto-Size I/O Window 0
0
1
I/O Window 0 Size (see bit 0 above) determines the data path to I/O Window 0.
The data path to I/O Window 0 will be determined based on -IOIS16 returned by the card.
This bit determines the data path to I/O Window 0. Note that when this bit is ‘1’, the -IOIS16 signal
(see page 17) determines the width of the data path to the card.
Bit 3 — Timing Register Select 0
0
1
Accesses made with timing specified in Timing Set 0.
Accesses made with timing specified in Timing Set 1.
This bit determines the access timing specification for I/O Window 0 (see page 72).
Bit 4 — I/O Window 1 Size
0
8-bit data path to I/O Window 1.
16-bit data path to I/O Window 1.
1
When bit 5 below is ‘0’, this bit determines the size of the data path to I/O Window 1. When bit 5
is ‘1’, this bit is ignored.
Bit 5 — Auto-Size I/O Window 1
0
1
I/O Window 1 Size (see bit 4) determines the data path to I/O Window 1.
The data path to I/O Window 1 will be determined based on -IOIS16 returned by the card.
This bit determines the width of the data path to I/O Window 1. Note that when this bit is ‘1’, the
-IOIS16 signal (see page 17) determines the window size. This bit must be set for proper ATA
mode operation (see Chapter 11).
May 1997
49
PRELIMINARY DATA SHEET v3.1
I/O WINDOW MAPPING REGISTERS
CIRRUS [ CIRRUS LOGIC ]
