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CAT1163WI-25 参数 Datasheet PDF下载

CAT1163WI-25图片预览
型号: CAT1163WI-25
PDF下载: 下载PDF文件 查看货源
内容描述: 监控电路,带有I2C串行串行EEPROM CMOS ,精密复位控制器和看门狗定时器 [Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer]
分类和应用: 外围集成电路光电二极管监控控制器可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 14 页 / 151 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT1163  
Hardware Data Protection  
whenever VCC falls below (power down) VTH or  
until VCC reaches the reset threshold (power up)  
VTH. Any attempt to access the internal EEPROM  
is not recognized and an ACK will not be sent on  
The CAT1163 is designed with the following hardware  
data protection features to provide a high degree of  
data integrity.  
¯¯¯¯¯¯  
the SDA line when RESET or RESET is active.  
(1) The CAT1163 features a WP pin. When the WP  
pin is tied high the entire memory array becomes  
write protected (read only).  
(2) The VCC sense provides write protection when VCC  
falls below the reset threshold value (VTH). The  
VCC lock out inhibits writes to the serial EEPROM  
Reset Threshold Voltage  
The CAT1163 is offered with five reset threshold  
voltage ranges. They are 4.50 ÷ 4.75V, 4.25 ÷ 4.50V,  
3.00 ÷ 3.15V, 2.85 ÷ 3.00V and 2.55 ÷ 2.70V.  
Figure 2. Bus Timing  
t
t
t
F
HIGH  
R
t
t
LOW  
LOW  
SCL  
t
t
HD:DAT  
SU:STA  
t
t
t
t
HD:STA  
SU:DAT  
SU:STO  
SDA IN  
BUF  
t
t
DH  
AA  
SDA OUT  
Figure 3. Write Cycle Timing  
SCL  
SDA  
8TH BIT  
BYTE n  
ACK  
t
WR  
STOP  
CONDITION  
START  
CONDITION  
ADDRESS  
Figure 4. Start/Stop Timing  
SDA  
SCL  
START BIT  
STOP BIT  
© 2007 Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
6
Doc. No. 3003 Rev. E