CAT1163
WRITE CYCLE LIMITS
Symbol
Parameter
Min
Typ
Max
Units
tWR
Write Cycle Time
10
ms
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave address.
RESET CIRCUIT CHARACTERISTICS
Symbol Parameter
tGLITCH Glitch Reject Pulse Width
VRT
Min
Typ
Max
Units
ns
100
Reset Threshold Hystersis
15
mV
V
VOLRS
VOHRS
Reset Output Low Voltage (IOLRS=1mA)
Reset Output High Voltage
0.4
VCC - 0.75
4.50
V
Reset Threshold (VCC=5V)
(CAT1163-45)
4.75
4.50
3.15
3.00
Reset Threshold (VCC=5V)
(CAT1163-42)
4.25
3.00
2.85
Reset Threshold (VCC=3.3V)
(CAT1163-30)
VTH
V
Reset Threshold (VCC=3.3V)
(CAT1163-28)
Reset Threshold (VCC=3V)
(CAT1163-25)
2.55
130
2.70
270
tPURST
tWP
Power-Up Reset Timeout
Watchdog Period
ms
sec
µs
V
1.6
tRPD
VTH to RESET Output Delay
RESET Output Valid
5
VRVALID
1
Doc. No. 3003 Rev. E
4
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CATALYST [ CATALYST SEMICONDUCTOR ]
