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TMC22153AKHC 参数 Datasheet PDF下载

TMC22153AKHC图片预览
型号: TMC22153AKHC
PDF下载: 下载PDF文件 查看货源
内容描述: 多标准数字视频解码器三线自适应梳状解码器系列, 8和10位 [Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit]
分类和应用: 解码器
文件页数/大小: 84 页 / 515 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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PRODUCT SPECIFICATION  
TMC22x5yA  
Reading (the R/W bit of the slave address byte HIGH)  
Table 25. Serial Port Addresses  
begins at the previously established base address. The  
address of the read register autoincrements after each byte is  
transferred.  
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1  
A
6
A
5
A
4
A
3
A
2
A
1
A
0
(MSB)  
(SA ) (SA ) (SA )  
2 1 0  
To terminate a write sequence to the TMC22x5yA, a stop  
signal must be sent. A stop signal comprises a LOW-to-  
HIGH transition of SDA while SCL is HIGH. To terminate a  
read sequence simply do not acknowledge (NOACK) the last  
byte received and the TMC22x5yA will terminate the  
sequence.  
1
1
1
1
1
1
1
1
0
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A repeated start signal occurs when the master device driv-  
ing the serial interface generates a start signal without first  
generating a stop signal to terminate the current communica-  
tion. This is used to change the mode of communication  
(read, write) between the slave and master without releasing  
the serial interface lines.  
Data Transfer via Serial Interface  
For each byte of data read or written, the MSB is the first bit;  
that is, bit 7 of the 8-bit sequence.  
Serial Interface Read/Write Examples  
Write to one control register  
• Start signal  
If the TMC22x5yA does not acknowledge the master device  
during a write sequence, the SDA remains HIGH so the mas-  
ter can generate a stop signal. If the master device does not  
acknowledge the TMC22x5yA during a read sequence, the  
Decoder interprets this as “end of data.” The SDA remains  
HIGH so the master can generate a stop signal.  
• Slave Address byte (R/W bit = LOW)  
• Block Pointer (00)  
• Base Address byte  
• Data byte to base address  
• Stop signal  
Writing data to specific control registers of the TMC22x5yA  
requires that the 8-bit address of the control register of inter-  
est be written after the slave address has been established.  
This control register address is the base address for subse-  
quent write operations. The base address autoincrements by  
one for each byte of data written after the data byte intended  
for the base address. If more bytes are transferred than there  
are available addresses, the address will not increment and  
remain at its maximum value of 3Fh. Any base address  
higher than 3Fh will not produce an ACKnowledge signal.  
Write to four consecutive XLUT locations  
• Start signal  
• Slave Address byte (R/W bit = LOW)  
• Block Pointer (01)  
• Base Address byte  
• Data byte to base address  
• Data byte to (base address + 1)  
• Data byte to (base address + 2)  
• Data byte to (base address + 3)  
• Stop signal  
Data are read from the control registers of the TMC22x5yA  
in a similar manner. Reading requires two data transfer  
operations:  
Read from one XLUT location  
The base address must be written with the R/W\ bit of the  
slave address byte LOW to set up a sequential read  
operation.  
• Start signal  
• Slave Address byte (R/W bit = LOW)  
SDA  
t
BUFF  
t
t
t
t
STOSU  
DHO  
DSU  
STASU  
t
STAH  
t
DAL  
SCL  
t
BAH  
65-22x5y-18  
Figure 35. Serial Port Read/Write Timing  
REV. 1.0.0 2/4/03  
69  
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