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BS62UV1024JC 参数 Datasheet PDF下载

BS62UV1024JC图片预览
型号: BS62UV1024JC
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功率/电压CMOS SRAM 128K ×8位 [Ultra Low Power/Voltage CMOS SRAM 128K X 8 bit]
分类和应用: 静态存储器
文件页数/大小: 11 页 / 391 K
品牌: BSI [ BRILLIANCE SEMICONDUCTOR ]
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BSI  
BS62UV1024  
„ SWITCHING WAVEFORMS (READ CYCLE)  
READ CYCLE1 (1,2,4)  
t
RC  
ADDRESS  
t
AA  
t
OH  
t
OH  
D OUT  
READ CYCLE2 (1,3,4)  
CE1  
t
t
ACS1  
ACS2  
CE2  
(5)  
CHZ2  
t
CHZ1,  
t
(5)  
CLZ  
t
D OUT  
READ CYCLE3 (1,4)  
ADDRESS  
t
RC  
t
AA  
OE  
t
OH  
t
OE  
t
OLZ  
CE1  
(5)  
t
ACS1  
t
OHZ  
(1,5)  
CHZ1  
(5)  
CLZ1  
t
t
t
CE2  
t
(5)  
ACS2  
(2,5)  
CHZ2  
t
CLZ2  
D OUT  
NOTES:  
1. WE is high in read Cycle.  
2. Device is continuously selected when CE1 = VIL and CE2= VIH.  
3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.  
4. OE = VIL  
.
5. Transition is measured 500mV from steady state with CL = 5pF as shown in Figure 1B.  
The parameter is guaranteed but not 100% tested.  
Revision 2.2  
April 2001  
R0201-BS62UV1024  
5
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