BMA253
Data sheet
Page 101
7.2 Inter-Integrated Circuit (I²C)
The I²C bus uses SCL (= SCx pin, serial clock) and SDA (= SDx pin, serial data input and
output) signal lines. Both lines are connected to VDDIO externally via pull-up resistors so that they
are pulled high when the bus is free.
The I²C interface of the BMA253 is compatible with the I²C Specification UM10204 Rev. 03 (19
June 2007), available at http://www.nxp.com. The BMA253 supports I²C standard mode and
fast mode, only 7-bit address mode is supported.
The default I²C address of the device is 0011000b (0x18). It is used if the SDO pin is pulled to
´GND´. The alternative address 0011001b (0x19) is selected by pulling the SDO pin to ´VDDIO´.
The timing specification for I²C of the BMA253 is given in Table 23:
Table 23: I²C timings
Parameter
Symbol
Condition
Min
Max
Units
Clock Frequency
SCL Low Period
SCL High Period
SDA Setup Time
SDA Hold Time
fSCL
tLOW
tHIGH
tSUDAT
tHDDAT
400
kHz
1.3
0.6
0.1
0.0
Setup Time for a
repeated Start
Condition
tSUSTA
0.6
s
Hold Time for a Start
Condition
Setup Time for a Stop
Condition
tHDSTA
tSUSTO
0.6
0.6
Time before a new
Transmission can
start
Idle time between
write accesses,
normal mode, standby
mode, low-power
mode 2
tBUF
1.3
2
tIDLE_wacc_n
µs
µs
m
Idle time between
write accesses,
suspend mode, low-
power mode 1
tIDLE_wacc_s
450
um
BST-BMA253-DS000-01 | Revision 1.0 | August 2015
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