BMA253
Data sheet
Page 100
The data bits are used as follows:
Bit0: Read/Write bit. When 0, the data SDI is written into the chip. When 1, the data SDO from
the chip is read.
Bit1-7: Address AD(6:0).
Bit8-15: when in write mode, these are the data SDI, which will be written into the address.
When in read mode, these are the data SDO, which are read from the address.
Multiple read operations are possible by keeping CSB low and continuing the data transfer.
Only the first register address has to be written. Addresses are automatically incremented after
each read access as long as CSB stays active low.
The principle of multiple read is shown in figure 16:
Control byte
Data byte
Data byte
Data byte
Register adress (02h)
Data register - adress 02h
Data register - adress 03h
Data register - adress 04h
Start RW
CSB
Stop
CSB
=
=
0
1
0
0
0
0
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
Figure 16: SPI multiple read
In SPI 3-wire configuration CSB (chip select low active), SCK (serial clock), and SDI (serial
data input and output) pins are used. The communication starts when the CSB is pulled low by
the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI master. SDI
is driven (when used as input of the device) at the falling edge of SCK and should be captured
(when used as the output of the device) at the rising edge of SCK.
The protocol as such is the same in 3-wire configuration as it is in 4-wire configuration. The
basic operation waveform (read or write access) for 3-wire configuration is depicted in figure 17:
CSB
SCK
SDI
RW AD6 AD5 AD4 AD3 AD2 AD1 AD0 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
Figure 17: 3-wire basic SPI read or write sequence (mode ´11´)
BST-BMA253-DS000-01 | Revision 1.0 | August 2015
Bosch Sensortec
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Note: Specifications within this document are subject to change without notice.
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