BMA253
Data sheet
Page 104
Example of an I²C read access:
Control byte
Slave Adress
Register adress (0x02)
Start
S
RW ACKS
0
ACKS
0
0
1
1
0
0
0
X
0
0
0
0
0
1
0
Data byte
Read Data (0x02)
Data byte
Slave Adress
Read Data (0x03)
Start
Sr
RW ACKS
1
ACKM
ACKM
ACKM
ACKM
ACKM
NACK
0
0
1
1
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
…
…
Data byte
Read Data (0x04)
Data byte
Read Data (0x05)
X
X
X
X
X
X
X
X
…
…
Data byte
Read Data (0x06)
Data byte
Read Data (0x07)
Stop
P
X
X
X
X
X
X
X
X
Figure 20: I²C multiple read
7.2.1 SPI and I²C Access Restrictions
In order to allow for the correct internal synchronisation of data written to the BMA253, certain
access restrictions apply for consecutive write accesses or a write/read sequence through the
SPI as well as I2C interface. The required waiting period depends on whether the device is
operating in normal mode (or standby mode, or low-power mode 2) or suspend mode (or low-
power mode 1).
As illustrated in figure 21, an interface idle time of at least 2 µs is required following a write
operation when the device operates in normal mode (or standby mode, or low-power mode 2).
In suspend mode (or low-power mode 1) an interface idle time of least 450 µs is required.
Write-Operation
X-Operation
Register Update Period
(> 2us / 450us)
Figure 21: Post-Write Access Timing Constraints
BST-BMA253-DS000-01 | Revision 1.0 | August 2015
Bosch Sensortec
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Note: Specifications within this document are subject to change without notice.
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