BMA253
Data sheet
Page 98
The following figure shows the definition of the SPI timings given in the following figure:
tCSB_setup
tCSB_hold
CSB
SCK
SDI
tSCKL tSCKH
tSDI_hold
tSDI_setup
SDO
tSDO_OD
Figure 13: SPI timing diagram
The SPI interface of the BMA253 is compatible with two modes, ´00´ and ´11´. The automatic
selection between [CPOL = ´0´ and CPHA = ´0´] and [CPOL = ´1´ and CPHA = ´1´] is controlled
based on the value of SCK after a falling edge of CSB.
Two configurations of the SPI interface are supported by the BMA253: 4-wire and 3-wire. The
same protocol is used by both configurations. The device operates in 4-wire configuration by
default. It can be switched to 3-wire configuration by writing ´1´ to (0x34) spi3. Pin SDI is used
as the common data pin in 3-wire configuration.
For single byte read as well as write operations, 16-bit protocols are used. The BMA253 also
supports multiple-byte read operations.
In SPI 4-wire configuration CSB (chip select low active), SCK (serial clock), SDI (serial data
input), and SDO (serial data output) pins are used. The communication starts when the CSB is
pulled low by the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI
master. SDI and SDO are driven at the falling edge of SCK and should be captured at the rising
edge of SCK.
BST-BMA253-DS000-01 | Revision 1.0 | August 2015
Bosch Sensortec
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Note: Specifications within this document are subject to change without notice.