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PCM3794A 参数 Datasheet PDF下载

PCM3794A图片预览
型号: PCM3794A
PDF下载: 下载PDF文件 查看货源
内容描述: 16位低功耗立体声音频编解码器,麦克风偏置,耳机和数字扬声器放大器 [16-Bit, Low-Power Stereo Audio CODEC With Microphone Bias, Headphone, and Digital Speaker Amplifier]
分类和应用: 解码器编解码器放大器
文件页数/大小: 68 页 / 1196 K
品牌: BB [ BURR-BROWN CORPORATION ]
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PCM3793A  
PCM3794A  
www.ti.com  
SLAS529AJANUARY 2007REVISED FEBRUARY 2007  
Table 5. Power Consumption Table  
OPERATION MODE  
POWER SUPPLY CURRENT [mA]  
PD [mW]  
PD [mW]  
VDD  
(1.8 V)  
VDD  
(3.3 V)  
VCC  
(3.3 V)  
VPA  
(3.3 V)  
VIO  
(3.3 V)  
TOTAL  
(VDD = 1.8  
V)  
TOTAL  
(VDD = 3.3 V)  
All Power Down  
All Active  
0
0
0.007  
7.5  
0.002  
11.6  
0
0.03  
67.7  
0.03  
80.2  
2.5  
5.1  
0.1  
PLAYBACK WITH DIGITAL INPUT  
Line output and headphone output  
1.18  
1.81  
1.18  
1.18  
1.18  
1.18  
2.51  
3.84  
2.51  
2.52  
2.52  
2.52  
1.79  
1.79  
1.8  
0.54  
0.54  
0.75  
0.54  
0.54  
0.54  
0.09  
0.09  
0.09  
0.09  
0.09  
0.09  
10.1  
11.2  
10.8  
11.1  
12.5  
13.4  
16.3  
20.7  
17.0  
17.3  
18.6  
19.6  
Headphone output with sound effect  
Capless headphone output  
Headphone output with line input (AIN2L/AIN2R)  
Headphone output with mono microphone input (AIN1L, 20 dB)  
2.09  
2.5  
Headphone output with mono differential microphone input  
(AIN1L/AIN1R, 20 dB)  
2.8  
Stereo speaker output  
1.21  
1.2  
2.58  
2.57  
2.57  
2.58  
2.58  
2.18  
2.01  
2.48  
2.89  
3.2  
10.94  
5.61  
0.09  
0.09  
0.09  
0.09  
0.09  
45.8  
27.6  
46.8  
48.2  
49.3  
52.1  
33.9  
53.1  
54.5  
55.6  
Mono speaker output  
Speaker output with line input (AIN2L/AIN2R)  
Speaker output with mono microphone input (AIN1L, 20 dB)  
1.21  
1.21  
1.2  
10.95  
10.96  
10.98  
Speaker output with mono differential microphone input  
(AIN1L/AIN1R, 20 dB)  
PLAYBACK WITHOUT DIGITAL INPUT  
Line input (AIN2L/AIN2R) to headphone output  
Mono line input (AIN2L) to headphone output  
Mono microphone Input (AIN1L, 20 dB) to headphone output  
0
0
0
0
0
0
0
0
0.76  
0.61  
1.18  
1.48  
0.53  
0.53  
0.53  
0.53  
0
0
0
0
4.3  
3.8  
5.6  
6.6  
4.3  
3.8  
5.6  
6.6  
Mono differential microphone input (AIN1L/AIN1R, 20 dB) to  
headphone output  
Mono microphone input (AIN1L, 20 dB) to speaker output  
RECORDING  
0
0
1.57  
10.92  
0
41.2  
41.2  
Line input (AIN3L/AIN3R)  
1.86  
1.86  
2.78  
1.4  
3.89  
3.91  
5.77  
2.93  
4.74  
2.94  
4.74  
4.58  
5.14  
5.14  
3.6  
0.13  
0.13  
0.13  
0.13  
0.13  
0.13  
0.13  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
19.1  
21.1  
22.7  
15.2  
16.6  
16.3  
17.8  
28.7  
30.6  
36.8  
22.3  
28.3  
23.5  
29.5  
Microphone input (AIN1L/AIN1R, 20 dB)  
Microphone input (AIN1L/AIN1R, 20 dB) with ALC  
Mono microphone input (AIN1L, 20 dB)  
Mono microphone input (AIN1L, 20 dB) with ALC  
Mono differential microphone input (AIN1L/AIN1R, 20 dB)  
2.2  
3.6  
1.4  
3.96  
3.96  
Mono differential microphone input (AIN1L/AIN1R, 20 dB) with  
ALC  
2.2  
Conditions: 48 kHz/256 fS, 16 bits, slave mode, zero data input, no load  
Audio Serial Interface  
The audio serial interface for the PCM3793A/94A comprises LRCK, BCK, DIN, and DOUT. Sampling rate (fS),  
left and right channel are present on LRCK. DIN receives the serial data for the DAC interpolation filter, and  
DOUT transmits the serial data from the ADC decimation filter. BCK clocks the transfer of serial audio data on  
DIN and DOUT in its high-to-low transition. BCK and LRCK should be synchronized with audio system clock.  
Ideally, it is recommended that they be derived from it.  
The PCM3793A/94A requires LRCK to be synchronized with the system clock. The PCM3793A/94A does not  
require a specific phase relationship between LRCK and the system clock.  
The PCM3793A/94A has both master mode and slave mode interface formats, which can be selected by  
register 84 (MSTR). In master mode, the PCM3793A/94A generates LRCK and BCK from the system clock.  
Audio Data Formats and Timing  
The PCM3793A/94A supports I2S, right-justified, left-justified, and DSP formats. The data formats are shown in  
Figure 29 and are selected using registers 70 and 81 (RFM[1:0], PFM[1:0]). All formats require binary  
2s-complement, MSB-first audio data. The default format is I2S. Figure 27 shows a detailed timing diagram.  
23  
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