ML
MC
MD
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
FIGURE 10. Control Data Input Format.
tMLH
tMLH
tMLS
ML
MC
MD
tMCH
tMCL
tMLL
tMCY
LSB
tMDS
tMDH
MC Pulse Cycle Time
MC Pulse Width LOW
MC Pulse Width HIGH
MD Setup Time
tMCY
tMCL
tMCH
tMDS
tMDH
tMLL
tMLH
tMLS
tMLH
100ns (min)
40ns (min)
40ns (min)
40ns (min)
40ns (min)
40ns + 1SYSCLK (min)
40ns + 1SYSCLK (min)
40ns (min)
MD Hold Time
ML Low Level Time
ML High Level Time
ML Setup Time
ML Hold Time
40ns (min)
SYSCLK: 1/256fS or 1/384fS or 1/512fS
FIGURE 11. Control Data Input Timing.
FUNCTION
ADC/DAC
PCM3002
PCM3003
Audio Data Format
LRCIN Polarity
ADC/DAC
ADC/DAC
4 Selectable Formats
O
2 Selectable Formats
X
Loop-Back Control
ADC/DAC
DAC
O
O
O
O
O
O
X
X
X
X
X
X
Left Channel Attenuation
Right Channel Attenuation
Attenuation Control
DAC
DAC
Infinite Zero Detection
DAC Output Control
DAC
DAC
Soft Mute Control
De-Emphasis (OFF, 32kHz, 44.1kHz, 48kHz)
DAC
DAC
O
O
X
O
ADC Power-Down Control
DAC Power-Down Control
High Pass Filter Operation
ADC
DAC
ADC
O
O
O
O
O
X
TABLE II. Selectable Functions (O = User Selectable; X = Not Available).
OPERATIONAL CONTROL
PCM3002 can be controlled in a software mode with a
three-wire serial interface on MC (pin 18), MD (pin 17), and
ML (pin 8). Table II indicates selectable functions, and
Figure 10 and 11 illustrate the control data input format and
timing. PCM3003 only allows for control of 16-/20-bit data
format, digital de-emphasis, and Power-Down Control by
hardware pins.
®
17
PCM3002/3003