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SBAS274E − MARCH 2003 − REVISED JUNE 2004
external capacitors, between the inputs and from each
input to AGND, improve linearity and should be placed as
close to the pins as possible. Place the drivers close to the
inputs and use good capacitor bypass techniques on their
supplies; usually a smaller high-quality ceramic capacitor
in parallel with a larger capacitor. Keep the resistances
used in the driver circuits low—thermal noise in the driver
circuits degrades the overall noise performance. When the
signal can be ac-coupled to the ADS1605/6 inputs, a
simple RC filter can set the input common mode voltage.
The ADS1605/6 is a high-speed, high−performance ADC.
Special care must be taken when selecting the test
equipment and setup used with this device. Pay particular
attention to the signal sources to ensure they do not limit
performance when measuring the ADS1605/6.
INPUT CIRCUITRY
The ADS1605/6 uses switched-capacitor circuitry to
measure the input voltage. Internal capacitors are charged
by the inputs and then discharged internally with this cycle
repeating at the frequency of CLK. Figure 8 shows a
conceptual diagram of these circuits. Switches S2 represent
the net effect of the modulator circuitry in discharging the
sampling capacitors, the actual implementation is different.
The timing for switches S1 and S2 is shown in Figure 9.
ADS1605
ADS1606
S1
AINP
AINN
S2
10pF
8pF
Ω
392
VMID
40pF
Ω
Ω
392
392
S1
V
IN
−
2
µ
0.01
1k
F
S2
Ω
49.9
10pF
8pF
AINP
OPA2822
(2)
(1)
V
CM
100pF
Ω
Ω
µ
F
VMID
392
1
AGND
(2)
Ω
392
ADS1605
ADS1606
(1)
(3)
V
100pF
CM
(2)
40pF
Ω
392
V
Ω
1k
IN
Figure 8. Conceptual Diagram of Internal
Circuitry Connected to the Analog Inputs
2
µ
0.01
F
Ω
49.9
AINN
OPA2822
Ω
392
(2)
(1)
CM
V
100pF
Ω
µ
F
392
1
tSAMPLE = 1/fCLK
AGND
On
Off
S1
S2
(1) Recommended VCM = 2.0V.
(2) Optional ac−coupling circuit provides common−mode input voltage.
≤
(3) Increase to 390pF when fIN 100kHz for improved SNR and THD.
On
Off
Figure 10. Recommended Driver Circuit Using the
OPA2822
Figure 9. Timing for the Switches in Figure 2
DRIVING THE INPUTS
22pF
Ω
Ω
24.9
24.9
AINP
Ω
392
100pF
100pF
Ω
Ω
392
392
The external circuits driving the ADS1605/6 inputs must be
able to handle the load presented by the switching capacitors
within the ADS1605/6. The input switches S1 in Figure 5 are
−
VIN
ADS1605
ADS1606
VCM
THS4503
+VIN
closed approximately one half of the sampling period, tsample
,
Ω
392
allowing only ≈12ns for the internal capacitors to be charged
by the inputs, when fCLK = 40MHz.
AINN
100pF
Figure 10 and Figure 11 show the recommended circuits
when using single-ended or differential op amps,
respectively. The analog inputs must be driven
differentially to achieve optimum performance. The
22pF
Figure 11. Recommended Driver Circuits Using
the THS4503 Differential Amplifier
18
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