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ADS1602IPFBT 参数 Datasheet PDF下载

ADS1602IPFBT图片预览
型号: ADS1602IPFBT
PDF下载: 下载PDF文件 查看货源
内容描述: 16位2.5MSPS模拟数字转换器 [16-Bit, 2.5MSPS Analog-to-Digital Converter]
分类和应用: 转换器
文件页数/大小: 26 页 / 395 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ꢉ ꢃꢠ ꢡꢢ ꢣꢤ  
www.ti.com  
SBAS341B − DECEMBER 2004 − REVISED APRIL 2005  
The McBSP provides a host of functions including:  
LAYOUT ISSUES AND COMPONENT SELECTION  
The ADS1602 is a very high-speed, high-resolution data  
converter. In order to achieve maximum performance, the  
user must give very careful consideration to both the layout  
of the printed circuit board (PCB) in addition to the routing  
of the traces. Capacitors that are critical to achieve the  
best performance from the device should be placed as  
close to the pins of the device as possible. These include  
capacitors related the analog inputs, the reference and the  
power supplies.  
D
D
D
Full-duplex communication  
Double-buffered data registers  
Independent framing and clocking for reception and  
transmission of data  
The sequence begins with a one-time synchronization of  
the serial port by the microprocessor. The ADS1602  
recognizes the SYNC signal if it is high for a least 1 CLK  
period. Transfers are initiated by the ADS1602 after the  
SYNC signal is de-asserted by the microprocessor.  
For critical capacitors, it is recommended that Class II  
dielectrics such as Z5U be avoided. These dielectrics  
have a narrow operating temperature, a large tolerance on  
the capacitance and will lose up to 20% of the rated  
capacitance over 10,000 hours. Rather, select capacitors  
with a Class I dielectric. C0G (also known as NP0), for  
example, has a tight tolerance < 30PPM/°C and is very  
stable over time. Should Class II capacitors be chosen  
because of the size constraints, select an X7R or X5R  
dielectric to minimize the variations of the capacitor’s  
critical characteristics.  
The FSO signal from the ADS1602 indicates that data is  
available to be read, and is connected to the Frame Sync  
Receive (FSR) pin of the DSP. The Clock Receiver (CLKR)  
is derived directly from the ADS1602 serial clock output to  
ensure continued synchronization of data with the clock.  
ADS1602  
FSO  
TMS320  
FSR  
The resistors used in the circuits driving the input and  
reference should be kept as low as possible to prevent  
excess thermal noise from degrading the system  
performance.  
SCLK  
DOUT  
SYNC  
CLKR  
DR  
The digital outputs from the device should always be  
buffered. This will have a number of benefits: it will reduce  
the loading of the internal digital buffers, which decreases  
noise generated within the device, and it will also reduce  
device power consumption.  
FSX  
Figure 54. ADS1602—TMS320 Interface  
Connection  
APPLICATIONS INFORMATION  
Interfacing the ADS1602 to the TMS320 DSP family.  
An Evaluation Module (EVM) is available from Texas  
Instruments. The module consists of the ADS1602 and  
supporting circuits, allowing users to quickly assess the  
performance and characteristics of the ADS1602. The  
EVM easily connects to various microcontrollers and DSP  
systems. For more details, or to download a copy of the  
ADS1602EVM User’s Guide, visit the Texas Instruments  
web site at www.ti.com.  
Since the ADS1602 communicates with the host via a  
serial interface, the most suitable method to connect to any  
of the TMS320 DSPs is via the Multi-channel Buffered  
Serial Port (McBSP). A typical connection to the TMS320  
DSP is shown in Figure 54.  
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