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SBAS341B − DECEMBER 2004 − REVISED APRIL 2005
ANALOG POWER DISSIPATION
Table 3. Recommended R
Resistor Values for
BIAS
Different CLK Frequencies
An external resistor connected between the RBIAS pin
and the analog ground sets the analog current level, as
shown in Figure 52. The current is inversely proportional
to the resistor value. Table 3 shows the recommended
values of RBIAS for different CLK frequencies. Notice that
the analog current can be reduced when using a slower
frequency CLK input because the modulator has more
time to settle. Avoid adding any capacitance in parallel to
DATA
RATE
TYPICAL POWER DISSIPATION
WITH REFEN HIGH
f
R
BIAS
CLK
16MHz
24MHz
32MHz
40MHz
1MHz
140kΩ
100kΩ
60kΩ
200mW
270mW
390mW
530mW
1.5MHz
2MHz
2.5MHz
37kΩ
R
BIAS, since this will interfere with the internal circuitry
used to set the biasing.
POWER DOWN (PD)
When not in use, the ADS1602 can be powered down by
taking the PD pin low. All circuitry will be shut down,
including the voltage reference. To minimize the digital
current during power down, stop the clock signal supplied
to the CLK input. There is an internal pull-up resistor of
170kΩ on the PD pin, but it is recommended that this pin
be connected to IOVDD if not used. Make sure to allow
time for the reference to start up after exiting power-down
mode. The internal reference typically requires 15ms.
After the reference has stabilized, allow at least 100
conversions for the modulator and digital filter to settle
before retrieving data.
ADS1602
RBIAS
RBIAS
AGND
Figure 52. External Resistor Used to Set Analog
Power Dissipation
21
BB [ BURR-BROWN CORPORATION ]
