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SBAS341B − DECEMBER 2004 − REVISED APRIL 2005
external capacitors, between the inputs and from each
input to AGND, improve linearity and should be placed as
close to the pins as possible. Place the drivers close to the
inputs and use good capacitor bypass techniques on their
supplies, such as a smaller high-quality ceramic capacitor
in parallel with a larger capacitor. Keep the resistances
used in the driver circuits low—thermal noise in the driver
circuits degrades the overall noise performance. When the
signal can be ac-coupled to the ADS1602 inputs, a simple
RC filter can set the input common-mode voltage. The
ADS1602 is a high-speed, high-performance ADC.
Special care must be taken when selecting the test
equipment and setup used with this device. Pay particular
attention to the signal sources to ensure they do not limit
performance when measuring the ADS1602.
INPUT CIRCUITRY
The ADS1602 uses switched-capacitor circuitry to measure
the input voltage. Internal capacitors are charged by the
inputs and then discharged internally with this cycle
repeating at the frequency of CLK. Figure 39 shows a
conceptual diagram of these circuits. Switches S2 represent
the net effect of the modulator circuitry in discharging the
sampling capacitors; the actual implementation is different.
The timing for switches S1 and S2 is shown in Figure 40.
ADS1602
S1
AINP
S2
10pF
8pF
Ω
392
VMID
S1
40pF
Ω
Ω
392
392
V
AINN
IN
−
2
S2
µ
0.01
1k
F
Ω
49.9
10pF
8pF
AINP
OPA2822
(2)
(1)
CM
V
100pF
VMID
Ω
Ω
µ
F
392
1
AGND
(2)
Ω
392
(1)
CM
(3)
V
100pF
ADS1602
(2)
40pF
Ω
392
V
Figure 39. Conceptual Diagram of Internal
Circuitry Connected to the Analog Inputs
Ω
1k
IN
2
µ
0.01
F
Ω
49.9
AINN
OPA2822
Ω
392
(2)
(1)
CM
V
100pF
Ω
µ
F
392
1
tSAMPLE = 1/fCLK
AGND
On
Off
(1) Recommended VCM = 1.5V.
(2) Optional ac−coupling circuit provides common−mode input voltage.
(3) Increase to 390pF when fIN 100kHz for improved SNR and THD.
S1
S2
≤
On
Off
Figure 41. Recommended Driver Circuit Using the
OPA2822
Figure 40. Timing for the Switches in Figure 39
22pF
24.9Ω
AINP
DRIVING THE INPUTS
Ω
392
100pF
100pF
392Ω
The external circuits driving the ADS1602 inputs must be
able to handle the load presented by the switching capacitors
within the ADS1602. The input switches S1 in Figure 39 are
closed for approximately one-half of the sampling period,
−VIN
VCM
THS4503
ADS1602
+VIN
Ω
392
Ω
392
Ω
24.9
t
sample, allowing only ≈ 11ns for the internal capacitors to be
AINN
charged by the inputs when fCLK = 40MHz.
100pF
Figure 41 and Figure 42 show the recommended circuits
when using single-ended or differential op amps,
respectively. The analog inputs must be driven
differentially to achieve optimum performance. The
22pF
Figure 42. Recommended Driver Circuit Using the
THS4503 Differential Amplifier
16
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