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SBAS341B − DECEMBER 2004 − REVISED APRIL 2005
digital output code of 7FFFh. Likewise, the most negative
measurable differential input is –VREF, which produces the
most negative digital output code of 8000h.
OVERVIEW
The ADS1602 is a high-performance delta-sigma ADC.
The modulator uses an inherently stable 2-1-1 multi-stage
architecture incorporating proprietary circuitry that allows
for very linear high-speed operation. The modulator
samples the input signal at 40MSPS (when fCLK = 40MHz).
A low-ripple linear phase digital filter decimates the
modulator output by 16 to provide high resolution 16-bit
output data.
The ADS1602 supports a very wide range of input signals.
For VREF = 3V, the full-scale input voltages are 3V.
Having such a wide input range makes out-of-range
signals unlikely. However, should an out-of-range signal
occur, the digital output OTR will go high.
The analog inputs must be driven with a differential signal
to achieve optimum performance. For the input signal:
Conceptually, the modulator and digital filter measure the
differential input signal, VIN = (AINP – AINN), against the
scaled differential reference, VREF = (VREFP – VREFN),
as shown in Figure 38. The voltage reference can either be
generated internally or supplied externally. A 3-wire serial
interface, designed for direct connection to DSPs, outputs
the data. A separate power supply for the I/O allows flexi-
bility for interfacing to different logic families. Out-of-range
conditions are indicated with a dedicated digital output pin.
Analog power dissipation is controlled using an external
resistor. This control allows reduced dissipation when op-
erating at slower speeds. When not in use, power con-
sumption can be dramatically reduced by setting the PD
pin low to enter Power-Down mode.
AINP ) AINN
VCM
+
2
the recommended common-mode voltage is 1.5V. In
addition to the differential and common-mode input
voltages, the absolute input voltage is also important. This
is the voltage on either input (AINP or AINN) with respect
to AGND. The range for this voltage is:
* 0.1V t (AINN or AINP) t 4.6V
If either input is taken below –0.1V, ESD protection diodes
on the inputs will turn on. Exceeding 4.6V on either input
will result in degradation in the linearity performance. ESD
protection diodes will also turn on if the inputs are taken
above AVDD (+5V).
ANALOG INPUTS (AINP, AINN)
The recommended absolute input voltage is:
The ADS1602 measures the differential signal,
VIN = (AINP – AINN), against the differential reference,
* 0.1V t (AINN or AINP) t 4.2V
V
REF = (VREFP – VREFN). The most positive measurable
Keeping the inputs within this range provides for optimum
performance.
differential input is VREF, which produces the most positive
VREFP VREFN
IOVDD
CLK
Σ
VREF
FSO
FSO
VIN
AINP
AINN
Σ∆
Modulator
SCLK
SCLK
DOUT
DOUT
Digital
Filter
Serial
Interface
Σ
Figure 38. Conceptual Block Diagram
15