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SBAS288D − JUNE 2003 − REVISED AUGUST 2004
REGISTER MAP
The operation of the ADS1255/6 is controlled through a set of registers. Collectively, the registers contain all the information
needed to configure the part, such as data rate, multiplexer settings, PGA setting, calibration, etc., and are listed in
Table 23.
Table 23. Register Map
RESET
VALUE
ADDRESS
REGISTER
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
STATUS
MUX
x1
01
20
ID3
ID2
ID1
ID0
ORDER
NSEL3
SDCS0
DR3
ACAL
NSEL2
PGA2
DR2
BUFEN
NSEL1
PGA1
DRDY
NSEL0
PGA0
DR0
H
H
H
PSEL3
0
PSEL2
CLK1
PSEL1
CLK0
PSEL0
SDCS1
DR4
ADCON
DRATE
IO
F0
H
DR7
DR6
DR5
DR1
E0
DIR3
DIR2
DIR1
DIR0
DIO3
DIO2
DIO1
DIO0
H
H
H
H
H
H
H
OFC0
OFC1
OFC2
FSC0
FSC1
FSC2
xx
xx
xx
xx
xx
xx
OFC07
OFC15
OFC23
FSC07
FSC15
FSC23
OFC06
OFC14
OFC22
FSC06
FSC14
FSC22
OFC05
OFC13
OFC21
FSC05
FSC13
FSC21
OFC04
OFC12
OFC20
FSC04
FSC12
FSC20
OFC03
OFC11
OFC19
FSC03
FSC11
FSC19
OFC02
OFC10
OFC18
FSC02
FSC10
FSC18
OFC01
OFC09
OFC17
FSC01
FSC09
FSC17
OFC00
OFC08
OFC16
FSC00
FSC08
FSC16
STATUS : STATUS REGISTER (ADDRESS 00h)
Reset Value = x1h
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
ORDER
BIT 2
ACAL
BIT 1
BUFEN
BIT 0
DRDY
ID
ID
ID
ID
Bits 7-4 ID3, ID2, ID1, ID0 Factory Programmed Identification Bits (Read Only)
Bit 3
ORDER: Data Output Bit Order
0 = Most Significant Bit First (default)
1 = Least Significant Bit First
Input data is always shifted in most significant byte and bit first. Output data is always shifted out most significant
byte first. The ORDER bit only controls the bit order of the output data within the byte.
Bit 2
ACAL: Auto-Calibration
0 = Auto-Calibration Disabled (default)
1 = Auto-Calibration Enabled
When Auto-Calibration is enabled, self-calibration begins at the completion of the WREG command that changes
the PGA (bits 0-2 of ADCON register), DR (bits 7-0 in the DRATE register) or BUFEN (bit 1 in the STATUS register)
values.
Bit 1
Bit 0
BUFEN: Analog Input Buffer Enable
0 = Buffer Disabled (default)
1 = Buffer Enabled
DRDY: Data Ready (Read Only)
This bit duplicates the state of the DRDY pin.
30
BB [ BURR-BROWN CORPORATION ]
