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ADS1254 参数 Datasheet PDF下载

ADS1254图片预览
型号: ADS1254
PDF下载: 下载PDF文件 查看货源
内容描述: 24位20kHz ,低功耗模拟数字转换器 [24-Bit, 20kHz, Low Power ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 17 页 / 281 K
品牌: BB [ BURR-BROWN CORPORATION ]
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Conversion Cycle—as used here, a conversion cycle refers  
to the time period between DOUT/DRDY pulses.  
Noise Reduction—for random noise, the ER can be im-  
proved with averaging. The result is the reduction in noise by  
the factor N, where N is the number of averages, as shown  
in Table V. This can be used to achieve true 24-bit perfor-  
mance at a lower data rate. To achieve 24 bits of resolution,  
more than 24 bits must be accumulated. A 36-bit accumulator  
Effective Resolution (ER)—of the ADS1254 in a particular  
configuration can be expressed in two different units:  
bits rms (referenced to output) and µVrms (referenced to  
input). Computed directly from the converter's output data,  
each is a statistical calculation based on a given number of  
results. Noise occurs randomly; the rms value represents a  
statistical measure that is one standard deviation. The ER in  
bits can be computed as follows:  
is required to achieve an ER of 24 bits. Table V uses VREF  
=
4.096V, with the ADS1254 outputting data at 20kHz, a 4096  
point average will take 204.8ms. The benefits of averaging  
will be degraded if the input signal drifts during that 200ms.  
2• VREF  
20log  
N
NOISE  
REDUCTION  
FACTOR  
ER  
IN  
Vrms  
ER  
IN  
BITS rms  
(Number  
of Averages)  
Vrms noise  
ER in bits rms =  
6.02  
1
2
1
1.414  
2
14.6µV  
10.3µV  
7.3µV  
19.1  
19.6  
20.1  
20.6  
21.1  
21.6  
22.1  
22.6  
23.1  
23.6  
24.1  
24.6  
25.1  
The 2 • VREF figure in each calculation represents the  
full-scale range of the ADS1254. This means that both units  
are absolute expressions of resolution—the performance in  
different configurations can be directly compared, regard-  
less of the units.  
4
8
2.82  
4
5.16µV  
3.65µV  
2.58µV  
1.83µV  
1.29µV  
0.91µV  
0.65µV  
0.46µV  
0.32µV  
0.23µV  
16  
32  
5.66  
8
64  
128  
256  
512  
1024  
2048  
4096  
11.3  
16  
fMODfrequency of the modulator and the frequency the  
input is sampled.  
22.6  
32  
CLK Frequency  
45.25  
64  
fMOD  
=
6
TABLE V. Averaging.  
fDATAData output rate.  
fMOD CLK Frequency  
fDATA  
=
=
64  
384  
ADS1254  
15  
SBAS213  
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