could include:
LAYOUT
• Multiple ADS1254s
POWER SUPPLY
• Extensive Analog Signal Processing
• One or More Microcontrollers, Digital Signal Processors,
or Microprocessors
• Many Different Clock Sources
• Interconnections to Various Other Systems
The power supply should be well regulated and low noise.
For designs requiring very high resolution from the ADS1254,
power-supply rejection will be a concern. Avoid running
digital lines under the device as they may couple noise onto
the die. High-frequency noise can capacitively couple into
the analog portion of the device and will alias back into the
passband of the digital filter, affecting the conversion result.
This clock noise will cause an offset error.
High resolution will be very difficult to achieve for this
design. The approach would be to break the system into as
many different parts as possible. For example, each ADS1254
may have its own “analog” processing front end.
GROUNDING
DEFINITION OF TERMS
The analog and digital sections of the system design should
be carefully and cleanly partitioned. Each section should
have its own ground plane with no overlap between them.
AGND should be connected to the analog ground plane, as
well as all other analog grounds. Do not join the analog and
digital ground planes on the board, but instead connect the
two with a moderate signal trace. For multiple converters,
connect the two ground planes at one location as central to
all of the converters as possible. In some cases, experimen-
tation may be required to find the best point to connect the
two planes together. The printed circuit board can be de-
signed to provide different analog/digital ground connec-
tions via short jumpers. The initial prototype can be used to
establish which connection works best.
An attempt has been made to be consistent with the termi-
nology used in this data sheet. In that regard, the definition
of each term is given as follows:
Analog-Input Differential Voltage—for an analog signal
that is fully differential, the voltage range can be compared
to that of an instrumentation amplifier. For example, if both
analog inputs of the ADS1254 are at 2.048V, the differen-
tial voltage is 0V. If one analog input is at 0V and the other
analog input is at 4.096V, then the differential voltage
magnitude is 4.096V. This is the case regardless of which
input is at 0V and which is at 4.096V. The digital-output
result, however, is quite different. The analog-input differ-
ential voltage is given by the following equation:
+VIN – (–VIN)
DECOUPLING
A positive digital output is produced whenever the
analog-input differential voltage is positive, while a nega-
tive digital output is produced whenever the differential is
negative. For example, a positive full-scale output is pro-
duced when the converter is configured with a 4.096V
reference, and the analog-input differential is 4.096V. The
negative full-scale output is produced when the differential
voltage is –4.096V. In each case, the actual input voltages
must remain within the –0.3V to +AVDD range.
Good decoupling practices should be used for the ADS1254
and for all components in the design. All decoupling capaci-
tors, and specifically the 0.1µF ceramic capacitors, should
be placed as close as possible to the pin being decoupled. A
1µF to 10µF capacitor, in parallel with a 0.1µF ceramic
capacitor, should be used to decouple Supply to ground.
SYSTEM CONSIDERATIONS
Actual Analog-Input Voltage—the voltage at any one
analog input relative to AGND.
The recommendations for power supplies and grounding
will change depending on the requirements and specific
design of the overall system. Achieving 24 bits of noise
performance is a great deal more difficult than achieving 12
bits of noise performance. In general, a system can be
broken up into four different stages:
Full-Scale Range (FSR)—as with most A/D Converters,
the full-scale range of the ADS1254 is defined as the “input”
that produces the positive full-scale digital output minus the
“input” that produces the negative full-scale digital output.
For example, when the converter is configured with a 4.096V
reference, the differential full-scale range is:
• Analog Processing
• Analog Portion of the ADS1254
• Digital Portion of the ADS1254
• Digital Processing
[4.096V (positive full scale) – (–4.096V) (negative full scale)] =
8.192V
For the simplest system consisting of minimal analog signal
processing (basic filtering and Gain), a microcontroller, and
one clock source, one can achieve high resolution by pow-
ering all components by a common power supply. In addi-
tion, all components could share a common ground plane.
Thus, there would be no distinctions between “analog”
power and ground, and “digital” power and ground. The
layout should still include a power plane, a ground plane,
and careful decoupling. In a more extreme case, the design
Least Significant Bit (LSB) Weight—this is the theoreti-
cal amount of voltage that the differential voltage at the
analog input would have to change in order to observe a
change in the output data of one least significant bit. It is
computed as follows:
Full – Scale Range 2• VREF
LSB Weight =
=
2N –1
2N –1
where N is the number of bits in the digital output.
ADS1254
14
SBAS213
BB [ BURR-BROWN CORPORATION ]
