SINGLE-SUPPLY OPERATION
MULTICHANNEL SYSTEMS
It is possible to operate the ADS1244 with a single supply.
For a 3V supply, simply connect AVDD and DVDD together.
Figure 17 shows an example of the ADS1244 running on a
single 5V supply. An external resistor, R1, is used to drop 5V
supply down to a desired voltage level of DVDD. For ex-
ample, if the desired DVDD supply voltage is 3V and AVDD
is 5V, the value of R1 should be:
Multiple ADS1244s can be operated in parallel to measure
multiple input signals. Figure 18 shows an example of a
2-channel system. For simplicity, the supplies and reference
circuitry were not included. The same CLK signal should be
applied to all devices. To be able to synchronize the
ADS1244s, connect the same SCLK signal to all devices as
well. When ready to synchronize, place all the devices in
Sleep Mode. Afterwards, “wakeup” and all the ADS1244s will
be synchronized. That is, they will sample the input signals
simultaneously.
R1 = (5V – 3V)/4.5µA ≈ 440kΩ
where 4.5µA is a typical digital current consumption when
DVDD = 3V (refer to the typical characteristic “Digital Current
vs Digital Supply”). A buffer on DRDY/DOUT can provide
level-shifting if required.
The DRDY/DOUT outputs will go LOW at approximately the
same time after synchronization. The falling edges indicating
that new data is ready will vary with respect to each other no
more than timing specification t14. This variation is due to
posible differences in the ADS1244’s internal calibration
settings. To account for this when using multiple devices,
either wait for t14 to pass after seeing one device’s
DRDY/DOUT go LOW, or wait until all DRDY/DOUTs have
gone LOW before retrieving data.
DVDD can be set to a desired voltage by choosing a proper
value of R1, but keep in mind that DVDD must be set
between 1.8V and 3.6V. Note that the maximum logic HIGH
output of DRDY/DOUT is equal to DVDD, but both CLK and
SCLK inputs can be driven with 5V logic regardless of the
DVDD or AVDD voltage. Use 0.1µF capacitors to bypass
both AVDD and DVDD.
ADS1244
1
2
3
4
5
GND
CLK 10
VREFP
VREFN
AINN
SCLK
9
8
7
6
OUT1
DRDY/DOUT
DVDD
to +5V logic
+5V
IN1
AINP
AVDD
SN74LVCC3245A
0.1µF
0.1µF
+
R1
from
from
+
ADS1244
+5V logic +5V logic
1
2
3
4
5
GND
CLK 10
10
9
8
7
6
VREFP
VREFN
AINN
SCLK
DRDY/DOUT
9
8
7
6
CLK
SCLK DRDY/DOUT DVDD
AVDD
OUT2
DVDD
AVDD
IN2
ADS1244
AINP
GND
1
VREFP
2
VREFN
3
AINN
4
AINP
5
CLK and SCLK
Sources
OUT1
t14
OUT2
SYMBOL DESCRIPTION
t14 Difference between DRDY/DOUT
going LOW in multichannel systems.
MIN
MAX
UNITS
FIGURE 17. Example of the ADS1244 Running on a Single
5V Supply.
s
±500
µs
FIGURE 18. Example of Using Multiple ADS1244s in Parallel.
ADS1244
14
SBAS273
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