V
V
V
V
E
V
V
V
V
E
IN+
IN-
IN+
IN-
0.1
µF
0.1
µF
0.1 µF
0.1 µF
–
–
5 V
+
5 V
+
V
V
LED2+
+
LED2+
+
–
–
30 V
30 V
DESAT
DESAT
CC1
CC1
GND1
V
GND1
V
CC2
0.1 µF
CC2
0.1 µF
I
I
C
C
RESET
FAULT
V
C
RESET
FAULT
V
C
+
+
0.1 µF
–
–
V
V
0.1 µF
OUT
OUT
30 V
30 V
650 µA
V
V
V
V
LED1+
EE
LED1+
EE
V
V
V
V
LED1-
EE
LED1-
EE
Figure 57. ICH test circuit.
Figure 58. ICH test circuit.
I
E
V
V
V
V
V
V
IN+
E
IN+
IN-
E
0.1
0.1 µF
–
–
+
µF
V
5 V
+
V
V
IN-
LED2+
+
LED2+
0.1
µF
–
30 V
30 V
V
DESAT
DESAT
CC1
CC1
GND1
V
GND1
V
CC2
0.1 µF
CC2
0.1 µF
I
C
RESET
FAULT
V
C
RESET
FAULT
V
C
+
+
–
–
V
0.1 µF
V
0.1 µF
OUT
OUT
30 V
30 V
V
V
V
V
LED1+
EE
LED1+
EE
V
V
V
V
LED1-
EE
LED1-
EE
Figure 59. ICL test circuit.
Figure 60. IEH test circuit.
I
E
V
V
V
V
E
IN+
IN-
0.1
µF
–
5 V
+
V
LED2+
+
0.1
µF
–
30 V
DESAT
CC1
GND1
V
V
CC2
0.1 µF
RESET
FAULT
V
C
+
–
0.1 µF
OUT
30 V
V
V
V
V
LED1+
LED1-
EE
EE
Figure 61. IEL test circuit.
20
AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
