SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM
4 Meg x 16 SDRAM
BANK3
BANK2
CONTROL
LOGIC
BANK1
CKE
CLK
CS\
WE\
CAS\
RAS\
BANK0
ROW-
ADDRESS
LATCH &
DECODER
BANK 0
MEMORY
REFRESH
COUNTER
2
2
12
DQML, DQMH
ROW
ADDRESS
MUX
12
MODE REGISTER
ARRAY
(4,096 X 256 X 16)
4096
1
DATA
12
12
2
OUTPUT
REGISTER
16
SENSE AMPLIFIERS
DQ0-DQ15
16
I/O GATING
2
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
DATA
INPUT
BANK
16
A0,
A10,
BA
CONTROL
LOGIC
REGISTER
2
ADDRESS
REGISTER
14
256
(X16)
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
8
8
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD4M16
Rev. 1.5 10/01
4
AUSTIN [ AUSTIN SEMICONDUCTOR ]
