欢迎访问ic37.com |
会员登录 免费注册
发布采购

AS29LV016JTRGR-55/IT 参数 Datasheet PDF下载

AS29LV016JTRGR-55/IT图片预览
型号: AS29LV016JTRGR-55/IT
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 2M ×8位/ 1M ×16位) CMOS 3.0伏只引导扇区闪存 [16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 40 页 / 408 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
 浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第14页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第15页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第16页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第17页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第19页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第20页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第21页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第22页  
COTS PEM  
BOOT SECTOR FLASH  
Austin Semiconductor, Inc.  
AS29LV016J  
WORD/BYTE PROGRAM COMMAND  
SEQUENCE  
This mode dispenses with the initial two unlock cycles  
required in the standard program command sequence,  
resulting in faster total programming time. Table 9 on  
page 21 shows the requirements for the command  
sequence.  
The system may program the device by word or byte,  
depending on the state of the BYTE# pin. Programming  
is a four-bus-cycle operation. The program command  
sequence is initiated by writing two unlock write cycles,  
followed by the program set-up command. The program  
address and data are written next, which in turn initiate  
the Embedded Program algorithm. The system is not  
required to provide further controls or timings. The device  
automatically generates the program pulses and verifies  
the programmed cell margin. Table 9 on page 21 shows  
the address and data requirements for the byte program  
command sequence.  
During the unlock bypass mode, only the Unlock Bypass  
Program and Unlock Bypass Reset commands are valid.  
To exit the unlock bypass mode, the system must issue  
the two-cycle unlock bypass reset command sequence.  
The first cycle must contain the data 90h; the second  
cycle the data 00h. Addresses are don’t care for both  
cycles. The device then returns to reading array data.  
Figure 3 illustrates the algorithm for the program operation.  
See Erase / Program Operations on page 32 for  
parameters, and to Figure 16, on page 33 for timing  
diagrams.  
When the Embedded Program algorithm is complete, the  
device then returns to reading array data and addresses  
are no longer latched. The system can determine the  
status of the program operation by using DQ7, DQ6, or  
RY/BY#. See Write Operation Status on page 22 for  
information on these status bits.  
START  
Any commands written to the device during the Embedded  
Program Algorithm are ignored. Note that a hardware  
reset immediately terminates the programming operation.  
The Byte Program command sequence should be  
reinitiated once the device has reset to reading array data,  
to ensure data integrity.  
Write Program  
Command Sequence  
Data Poll  
from System  
Embedded  
Programming is allowed in any sequence and across  
sector boundaries. A bit cannot be programmed from  
a 0 back to a 1. Attempting to do so may halt the  
operation and set DQ5 to 1, or cause the Data# Polling  
algorithm to indicate the operation was successful.  
However, a succeeding read will show that the data is  
still 0. Only erase operations can convert a 0 to a 1.  
Program  
algorithm  
in progress  
Verify Data?  
No  
Yes  
No  
UNLOCK BYPASS COMMAND SEQUENCE  
The unlock bypass feature allows the system to program  
bytes or words to the device faster than using the standard  
program command sequence. The unlock bypass  
command sequence is initiated by first writing two unlock  
cycles. This is followed by a third write cycle containing  
the unlock bypass command, 20h. The device then enters  
the unlock bypass mode. A two-cycle unlock bypass  
program command sequence is all that is required to  
program in this mode. The first cycle in this sequence  
contains the unlock bypass program command, A0h; the  
second cycle contains the program address and data.  
Additional data is programmed in the same manner.  
Increment Address  
Last Address?  
Yes  
Programming  
Completed  
Note: See Table 9 on page 21 for program command  
sequence.  
Figure 3. Program Operation  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS29LV016J  
Rev. 0.0 02/09  
18  
 复制成功!