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AS28F128J3MRG-15/XT 参数 Datasheet PDF下载

AS28F128J3MRG-15/XT图片预览
型号: AS28F128J3MRG-15/XT
PDF下载: 下载PDF文件 查看货源
内容描述: 塑封微电路128MB, x8和x16 Q- FLASH内存,即使扇形,每个单元架构单位 [Plastic Encapsulated Microcircuit 128Mb, x8 and x16 Q-FLASH Memory Even Sectored, Single Bit per Cell Architecture]
分类和应用: 内存集成电路光电二极管
文件页数/大小: 8 页 / 112 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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PEM  
AS28F128J3M  
Q-Flash  
Austin Semiconductor, Inc.  
Bus Operations:  
MODE  
RP\  
CE0  
CE1  
CE2  
OE\  
WE\  
VPEN  
DQ  
NOTES ADDRESS  
STS Default Mode  
Read Array  
Output Disable  
Standby  
Reset/Power-Down  
Read Identifier Codes  
Read Query  
Read Status (ISM off)  
Read Status (ISN on)  
Write  
VIH  
VIH  
VIH  
VIL  
VIH  
VIH  
VIH  
VIH  
VIH  
Enabled Enabled Enabled  
Enabled Enabled Enabled  
Disabled Disabled Disabled  
VIL  
VIH  
X
VIH  
VIH  
X
X
X
X
X
X
X
X
Dout  
1,2,3  
X
X
X
X
High-Z (VOH with External PU)  
High-Z  
High-Z  
High-Z  
X
X
X
X
X
X
X
High-Z (VOH with External PU)  
High-Z (VOH with External PU)  
High-Z (VOH with External PU)  
Enabled Enabled Enabled  
Enabled Enabled Enabled  
Enabled Enabled Enabled  
Enabled Enabled Enabled  
Enabled Enabled Enabled  
VIL  
VIL  
VIL  
VIL  
VIH  
VIH  
VIH  
VIH  
VIH  
VIL  
4
5
See Figure 7 of Micron DS  
See Figure 7 of Micron DS  
X
X
X
X
X
X
.
X
Dout  
Din  
VPENH  
3,6,7  
Notes  
1
2
3
Refer to DC Characteristics. When VPEN</= VPENLK, memory contents can be read but not altered  
X can be VIL or VIH for control and address pins, and VPENLK or VPENH for VPEN. See DC Characteristics for VPENLK and VPENH voltages  
In default mode, STA is VOL when the ISM is executing internal Block Erase, Program, or lock bit configuration algorithms. It is VOH when the ISM  
is not busy, in block erase suspend mode, program suspend mode, or reset/power-down mode.  
See Read Identifier codes of the Micron Datasheet (DS)  
See Read Query Mode Command section of the Micron Datasheet (DS)  
Command Writes involving block erase, program, or lock bit configuration are reliably executed when VPEN=VPENH and VCC is within Specification  
Refer to Table 4 on page 15 of the Micron Datasheet (DS)  
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5
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7
DC Electrical Characteristics:  
(VDD=3.0v-5%/+10%,TA=Min/Max temperatures of Operational  
Range chosen)  
Symbol  
Parameter  
Supply Voltage  
Isolated Input/Output Supply  
Input Load Current  
Test Conditions  
Min  
Max  
Units  
Notes  
Vcc  
VccQ  
ILI  
2.7  
2.7  
3.6  
3.6  
+/- 1.0  
V
V
uA  
Vin=VccQ or GND, VCC=VCC Max., VCCQ = VCCQ Max  
Vin=VccQ or GND, VCC=VCC Max., VCCQ = VCCQ Max  
ILO  
VIL  
VIH  
Output Leakage Current  
Input Low Voltage  
Input High Voltage  
+/-10.0  
0.8  
VCCQ+0.5  
0.4  
uA  
V
V
V
V
-0.5  
2
1
1
VccQ=VccQ (MIN), IOL = 2mA  
VccQ=VccQ (MIN), IOL = 100uA  
VccQ=VccQ (MIN), IOH = 2.5mA  
VccQ=VccQ (MIN), IOH = 100uA  
VOL  
VOH  
Output Low Voltage  
Output High Voltage  
1,2  
1
0.2  
0.85xVCCQ  
VCCQ-0.2  
V
V
VPENLK  
VPENH  
VLKO  
Program Voltage Lockout  
Program Voltage  
Vcc Lockout Voltage  
Standby Current  
0.8  
3.6  
V
V
V
uA  
uA  
uA  
3,4,5  
4,5,6  
1
2.2  
50  
90  
50  
CMOS Inputs; VCC= VCC (MAX), Device Enabled, RP\=VCCQ+/-0.2v  
TTL Inputs; VCC=VCC (MAX): Device Enabled, RP\=VIH  
RP\=GND,+/-0.2V; IOUT (STS)=0mA  
ICC1  
220  
2000  
120  
ICC2  
ICC3  
Power-Down Current  
CMOS Inputs; VCC=VCC(MAX); VCCQ=VCCQ(MAX) using standard 4-word  
page mode READS; Device is enabled; f=5MHz; IOUT=0mA  
CMOS Inputs; Vcc=Vcc(MAX); VCCQ=VCCQ(MAX) using standard 4-word  
page mode READS; Device is enabled; Ff=33MHz; IOUT=0mA  
CMOS Inputs; VCC=VCC(MAX); VCCQ=VCCQ(MAX) using standard work/byte  
single READS; Device Enabled; f=5MHz; IOUT=0mA  
CMOS Inputs, VPEN=VCC  
3
8
9
10  
15  
50  
mA  
mA  
mA  
mA  
mA  
Page Mode READ Current  
Asynchronous READ Mode  
Current  
PROGRAM or set LOCK BITS  
Current  
BLOCL ERASE or CLEAR  
BLOCK LOCK bits Current  
PROGRAM SUSPEND or  
BLOCK ERASE SUSPEND  
Current  
ICC4  
ICC5  
ICC6  
17  
17  
17  
17  
60  
70  
70  
80  
TTL Inputs, VPEN=VCC  
CMOS Inputs, VPEN=VCC  
TTL Inputs, VPEN=VCC  
Device is Disabled  
ICC7  
10  
mA  
Notes  
[1]  
[2]  
[3]  
Sampled, not 100% tested  
Includes STS  
ICCWS and ICCES are specified with the device deselected. If the device is read or written while in ERASE SUSPEND mode,  
the device's curent draw is ICCR or ICCW  
[4]  
BLOCK ERASE, PROGRAMMING, and LOCK BIT configurations are inhibited when VPEN</= VPENLK, and they are not  
guaranteed in the range betwwn VPENLK (MAX) and VPENH (MIN), or above VPENH (Max)  
Typically, VPEN is connected to VCC  
[5]  
[6]  
VPENH (MIN) = 2.7v  
AS28F128J3MRG  
Austin Semiconductor, Inc. reserves the right to change products or modify product specifications with appropriate notification  
Revision 5.0 11/23/04  
For Additional Products and Information visit out Web site at www.austinsemiconductor.com  
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