欢迎访问ic37.com |
会员登录 免费注册
发布采购

MEGA128CAN 参数 Datasheet PDF下载

MEGA128CAN图片预览
型号: MEGA128CAN
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有ISP功能的Flash和CAN控制器128K字节 [Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER]
分类和应用: 微控制器
文件页数/大小: 413 页 / 5507 K
品牌: ATMEL [ ATMEL ]
 浏览型号MEGA128CAN的Datasheet PDF文件第54页浏览型号MEGA128CAN的Datasheet PDF文件第55页浏览型号MEGA128CAN的Datasheet PDF文件第56页浏览型号MEGA128CAN的Datasheet PDF文件第57页浏览型号MEGA128CAN的Datasheet PDF文件第59页浏览型号MEGA128CAN的Datasheet PDF文件第60页浏览型号MEGA128CAN的Datasheet PDF文件第61页浏览型号MEGA128CAN的Datasheet PDF文件第62页  
0x0016  
0x0018  
0x001A  
0x001C  
0x001E  
0x0020  
0x0022  
0x0024  
0x0026  
0x0028  
0x002A  
0x002C  
0x002E  
0x0030  
0x0032  
0x0034  
0x0036  
0x0038  
0x003A  
0x003C  
0x003E  
0x0040  
0x0042  
0x0044  
0x0046  
0x0048  
;
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
jmp  
TIM1_CAPT ; Timer1 Capture Handler  
TIM1_COMPA ; Timer1 CompareA Handler  
TIM1_COMPB ; Timer1 CompareB Handler  
TIM1_OVF  
TIM1_OVF  
; Timer1 CompareC Handler  
; Timer1 Overflow Handler  
TIM0_COMP ; Timer0 Compare Handler  
TIM0_OVF  
CAN_IT  
; Timer0 Overflow Handler  
; CAN Handler  
CTIM_OVF  
SPI_STC  
; CAN Timer Overflow Handler  
; SPI Transfer Complete Handler  
USART0_RXC ; USART0 RX Complete Handler  
USART0_DRE ; USART0,UDR Empty Handler  
USART0_TXC ; USART0 TX Complete Handler  
ANA_COMP  
ADC  
; Analog Comparator Handler  
; ADC Conversion Complete Handler  
; EEPROM Ready Handler  
EE_RDY  
TIM3_CAPT ; Timer3 Capture Handler  
TIM3_COMPA ; Timer3 CompareA Handler  
TIM3_COMPB ; Timer3 CompareB Handler  
TIM3_COMPC ; Timer3 CompareC Handler  
TIM3_OVF  
; Timer3 Overflow Handler  
USART1_RXC ; USART1 RX Complete Handler  
USART1_DRE ; USART1,UDR Empty Handler  
USART1_TXC ; USART1 TX Complete Handler  
TWI  
; TWI Interrupt Handler  
; SPM Ready Handler  
SPM_RDY  
0x0049  
0x004A  
0x004B  
RESET: ldi  
out  
r16, high(RAMEND); Main program start  
SPH,r16  
;Set Stack Pointer to top of RAM  
ldi  
r16, low(RAMEND)  
SPL,r16  
0x004C  
0x004D  
out  
sei  
; Enable interrupts  
0x004E  
...  
<instr> xxx  
... ...  
...  
When the BOOTRST Fuse is unprogrammed, the Boot section size set to 8K bytes and  
the IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most  
typical and general program setup for the Reset and Interrupt Vector Addresses is:  
;Address Labels Code  
Comments  
0x0000  
0x0001  
0x0002  
RESET: ldi  
out  
r16,high(RAMEND) ; Main program start  
SPH,r16  
; Set Stack Pointer to top of RAM  
ldi  
r16,low(RAMEND)  
SPL,r16  
0x0003  
0x0004  
out  
sei  
; Enable interrupts  
0x0005  
;
<instr> xxx  
.org 0xF002  
0xF002  
jmp  
jmp  
EXT_INT0  
PCINT0  
; IRQ0 Handler  
0xF004  
; PCINT0 Handler  
58  
AT90CAN128  
4250E–CAN–12/04  
 复制成功!