ATmega64A
Table 26-8. Explanation of Different Variables Used in Figure 26-3 and the Mapping to the Z-
pointer(1)(2)
Corresponding
Variable
PCMSB
Z-value
Description
14
6
Most significant bit in the Program Counter. (The
Program Counter is 15 bits PC[14:0]).
Most significant bit which is used to address the
words within one page (128 words in a page
requires seven bits PC [6:0]).
PAGEMSB
ZPCMSB
Z15
Z7
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
ZPAGEMSB
PCPAGE
PC[14:7]
PC[6:0]
Z15:Z8
Z7:Z1
Program Counter page address: Page select, for
Page Erase and Page Write
Program Counter word address: Word select, for
filling temporary buffer (must be zero during Page
Write operation)
PCWORD
Note:
1. Z0: should be zero for all SPM commands, byte select for the LPM instruction.
2. See “Addressing the Flash During Self-programming” on page 286 for details about the use of
Z-pointer during Self-programming.
26.9 Register Description
26.9.1
SPMCSR – Store Program Memory Control Register
The Store Program Memory Control Register contains the control bits needed to control the Boot
Loader operations.
Bit
7
SPMIE
R/W
0
6
5
–
4
RWWSRE
R/W
3
BLBSET
R/W
0
2
PGWRT
R/W
0
1
PGERS
R/W
0
0
SPMEN
R/W
0
RWWSB
SPMCSR
(0x68)
Read/Write
Initial Value
R
0
R
0
0
• Bit 7 – SPMIE: SPM Interrupt Enable
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM
ready interrupt will be enabled. The SPM ready interrupt will be executed as long as the SPMEN
bit in the SPMCSR Register is cleared.
• Bit 6 – RWWSB: Read-While-Write Section Busy
When a Self-programming (Page Erase or Page Write) operation to the RWW section is initi-
ated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, the RWW section
cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bit is written to one after a
Self-programming operation is completed. Alternatively the RWWSB bit will automatically be
cleared if a page load operation is initiated.
• Bit 5 – Res: Reserved Bit
This bit is a reserved bit in the ATmega64A and always read as zero.
293
8160C–AVR–07/09
ATMEL [ ATMEL ]
