ATmega64A
The Boundary-scan logic is not included in the figures in this Datasheet. Figure 25-4 shows a
simple digital Port Pin as described in the section “I/O Ports” on page 68. The Boundary-scan
details from Figure 25-3 replaces the dashed box in Figure 25-4.
When no alternate port function is present, the Input Data – ID corresponds to the PINxn Regis-
ter value (but ID has no synchronizer), Output Data corresponds to the PORT Register, Output
Control corresponds to the Data Direction – DD Register, and the Pull-up Enable – PUExn – cor-
responds to logic expression PUD · DDxn · PORTxn.
Digital alternate port functions are connected outside the dotted box in Figure 25-4 to make the
scan chain read the actual pin value. For analog function, there is a direct connection from the
external pin to the analog circuit, and a scan chain is inserted on the interface between the digi-
tal logic and the analog circuitry.
Figure 25-3. Boundary-scan Cell for Bi-directional Port Pin with Pull-up Function
ShiftDR
To Next Cell
EXTEST
Vcc
0
1
FF2
Q
LD2
0
1
D
D
Q
G
FF1
D Q
LD1
0
1
0
1
D
G
Q
0
1
FF0
D
LD0
0
1
0
1
Q
D
G
Q
From Last Cell
ClockDR
UpdateDR
263
8160C–AVR–07/09
ATMEL [ ATMEL ]
