ATmega64A
Table 15-3 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast
PWM mode
Table 15-3. Compare Output Mode, Fast PWM(1)
COMnA1/
COMnB1/
COMnC0
COMnA0/
COMnB0/
COMnC0
Description
0
0
0
1
Normal port operation, OCnA/OCnB/OCnC disconnected.
WGMn3:0 = 15: Toggle OCnA on Compare Match, OCnB/OCnC
disconnected (normal port operation).
For all other WGMn settings, normal port operation,
OCnA/OCnB/OCnC disconnected.
1
1
0
1
Clear OCnA/OCnB/OCnC on Compare Match, set
OCnA/OCnB/OCnC at BOTTOM (non-inverting mode).
Set OCnA/OCnB/OCnC on Compare Match, clear
OCnA/OCnB/OCnC at BOTTOM (inverting mode).
Note:
1. A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the Compare Match is ignored, but the set or
clear is done at BOTTOM. See “Fast PWM Mode” on page 124. for more details.
Table 15-3 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase
correct and frequency correct PWM mode.
Table 15-4. Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM(1)
COMnA1/
COMnB1/
COMnC1
COMnA0/
COMnB0/
COMnC0
Description
0
0
0
1
Normal port operation, OCnA/OCnB/OCnC disconnected.
WGMn3:0 = 9 or 11: Toggle OCnA on Compare Match, OCnB/OCnC
disconnected (normal port operation).
Forr all other WGMn settings, normal port operation,
OCnA/OCnB/OCnC disconnected.
1
1
0
1
Clear OCnA/OCnB/OCnC on Compare Match when up-counting. Set
OCnA/OCnB/OCnC on Compare Match when downcounting.
Set OCnA/OCnB/OCnC on Compare Match when up-counting. Clear
OCnA/OCnB/OCnC on Compare Match when downcounting.
Note:
1. A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. See “Phase Correct PWM Mode” on page 126. for more
details.
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 15-5. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes. (See “Modes of Operation” on page 123.)
134
8160C–AVR–07/09
ATMEL [ ATMEL ]
