ATmega64A
Figure 14-9 shows the same timing data, but with the prescaler enabled.
Figure 14-9. Timer/Counter Timing Diagram, with Prescaler (fclk_I/O/8)
clkI/O
clkTn
(clkI/O/8)
TCNTn
TOVn
MAX - 1
MAX
BOTTOM
BOTTOM + 1
Figure 14-10 shows the setting of OCF0 in all modes except CTC mode.
Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF0, with Prescaler (fclk_I/O/8)
clkI/O
clkTn
(clkI/O/8)
TCNTn
OCRn
OCFn
OCRn - 1
OCRn
OCRn + 1
OCRn + 2
OCRn Value
Figure 14-11 shows the setting of OCF0 and the clearing of TCNT0 in CTC mode.
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8160C–AVR–07/09