– enables a hardware loop back, internal TxCAN on internal RxCAN
– provides a recessive level on TXCAN output pin
– does not disable RXCAN input pin
– freezes TEC and REC error counters
Figure 16-6. Listening Mode
internal
PD5
TxCAN
TXCAN
RXCAN
LISTEN
internal
1
0
PD6
RxCAN
16.4.2
Bit Timing
FSM’s (Finite State Machine) of the CAN channel need to be synchronous to the time quantum.
So, the input clock for bit timing is the clock used into CAN channel FSM’s.
Field and segment abbreviations:
• BRP: Baud Rate Prescaler.
• TQ: Time Quantum (output of Baud Rate Prescaler).
• SYNS: SYNchronization Segment is 1 TQ long.
• PRS: PRopagation time Segment is programmable to be 1, 2, ..., 8 TQ long.
• PHS1: PHase Segment 1 is programmable to be 1, 2, ..., 8 TQ long.
• PHS2: PHase Segment 2 is programmable to be ≤PHS1 and ≥ INFORMATION
PROCESSING TIME.
• INFORMATION PROCESSING TIME is 2 TQ.
• SJW: (Re) Synchronization Jump Width is programmable between 1 and min(4, PHS1).
The total number of TQ in a bit time has to be programmed at least from 8 to 25.
Figure 16-7. Sample and Transmission Point
Bit Timing
PRS (3-bit length)
Sample
PHS1 (3-bit length)
Point
Fcan (Tscl)
Time Quantum
CLK
Prescaler BRP
IO
Transmission
Point
PHS2 (3-bit length)
SJW (2-bit length)
176
ATmega16/32/64/M1/C1
7647F–AVR–04/09
ATMEL [ ATMEL ]
