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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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Analog Comparator  
Multiplexed Input  
It is possible to select any of the ADC7..0 pins to replace the negative input to the Ana-  
log Comparator. The ADC multiplexer is used to select this input, and consequently, the  
ADC must be switched off to utilize this feature. If the Analog Comparator Multiplexer  
Enable bit (ACME in ADCSRB) is set and the ADC is switched off (ADEN in ADCSRA is  
zero), MUX2..0 in ADMUX select the input pin to replace the negative input to the Ana-  
log Comparator, as shown in Table 97. If ACME is cleared or ADEN is set, AIN1 is  
applied to the negative input to the Analog Comparator.  
Table 97. Analog Comparator Multiplexed Input  
ACME  
ADEN  
MUX2..0  
xxx  
Analog Comparator Negative Input  
0
1
1
1
1
1
1
1
1
1
x
1
0
0
0
0
0
0
0
0
AIN1  
xxx  
AIN1  
000  
ADC0  
ADC1  
ADC2  
ADC3  
ADC4  
ADC5  
ADC6  
ADC7  
001  
010  
011  
100  
101  
110  
111  
Digital Input Disable Register  
1 – DIDR1  
Bit  
7
6
5
4
3
2
1
AIN1D  
R/W  
0
0
AIN0D  
R/W  
0
DIDR1  
Read/Write  
Initial Value  
R
0
R
0
R
0
R
0
R
0
R
0
• Bit 7..2 – Res: Reserved Bits  
These bits are unused bits in the ATmega48/88/168, and will always read as zero.  
• Bit 1, 0 – AIN1D, AIN0D: AIN1, AIN0 Digital Input Disable  
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled.  
The corresponding PIN Register bit will always read as zero when this bit is set. When  
an analog signal is applied to the AIN1/0 pin and the digital input from this pin is not  
needed, this bit should be written logic one to reduce power consumption in the digital  
input buffer.  
230  
ATmega48/88/168  
2545D–AVR–07/04  
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