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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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ATmega48/88/168  
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Out-  
put Compare Register B (OCR1B).  
Note that a Forced Output Compare (FOC1B) strobe will not set the OCF1B Flag.  
OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is  
executed. Alternatively, OCF1B can be cleared by writing a logic one to its bit location.  
• Bit 1 – OCF1A: Timer/Counter1, Output Compare A Match Flag  
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Out-  
put Compare Register A (OCR1A).  
Note that a Forced Output Compare (FOC1A) strobe will not set the OCF1A Flag.  
OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is  
executed. Alternatively, OCF1A can be cleared by writing a logic one to its bit location.  
• Bit 0 – TOV1: Timer/Counter1, Overflow Flag  
The setting of this flag is dependent of the WGM13:0 bits setting. In Normal and CTC  
modes, the TOV1 Flag is set when the timer overflows. Refer to Table 57 on page 127  
for the TOV1 Flag behavior when using another WGM13:0 bit setting.  
TOV1 is automatically cleared when the Timer/Counter1 Overflow Interrupt Vector is  
executed. Alternatively, TOV1 can be cleared by writing a logic one to its bit location.  
131  
2545D–AVR–07/04  
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