Table 91. Boundary-scan Signals for the ADC (Continued)
Recommended
Input when Not
in Use
Output Values when Recommended
Inputs are used, and CPU is not
Using the ADC
Signal
Name
Direction as Seen
from the ADC
Description
MUXEN_2
MUXEN_1
MUXEN_0
Input
Input
Input
Input Mux bit 2
Input Mux bit 1
Input Mux bit 0
0
0
1
0
0
0
1
0
NEGSEL_2 Input
NEGSEL_1 Input
NEGSEL_0 Input
Input Mux for negative input for
differential signal, bit 2
Input Mux for negative input for
differential signal, bit 1
0
0
0
0
Input Mux for negative input for
differential signal, bit 0
PASSEN
PRECH
Input
Input
Enable pass-gate of gain stages.
1
1
1
1
Precharge output latch of
comparator. (Active low)
SCTEST
ST
Input
Input
Switch-cap TEST enable. Output
from x10 gain stage send out to
Port Pin having ADC_4
0
0
0
0
Output of gain stages will settle
faster if this signal is high first two
ACLK periods after AMPEN goes
high.
VCCREN
Input
Selects Vcc as the ACC reference
voltage.
0
0
Note:
Incorrect setting of the switches in Figure 123 will make signal contention and may damage the part. There are several input
choices to the S&H circuitry on the negative input of the output comparator in Figure 123. Make sure only one path is selected
from either one ADC pin, Bandgap reference source, or Ground.
236
ATmega32(L)
2503J–AVR–10/06
ATMEL [ ATMEL ]
