• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in “ADC Conversion
Result” on page 213.
Special FunctionIO Register –
SFIOR
Bit
7
ADTS2
R/W
0
6
ADTS1
R/W
0
5
ADTS0
R/W
0
4
–
3
ACME
R/W
0
2
1
PSR2
R/W
0
0
PSR10
R/W
0
PUD
R/W
0
SFIOR
Read/Write
Initial Value
R
0
• Bit 7:5 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will
trigger an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no
effect. A conversion will be triggered by the rising edge of the selected Interrupt Flag.
Note that switching from a trigger source that is cleared to a trigger source that is set,
will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set, this will
start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trig-
ger event, even if the ADC Interrupt Flag is set.
Table 86. ADC Auto Trigger Source Selections
ADTS2
ADTS1
ADTS0
Trigger Source
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
• Bit 4 – Res: Reserved Bit
This bit is reserved for future use in the ATmega32. For ensuring compability with future
devices, this bit must be written zero when SFIOR is written.
218
ATmega32(L)
2503J–AVR–10/06
ATMEL [ ATMEL ]
