ATmega640/1280/1281/2560/2561
When pulsing WR or OE, the command loaded determines the action executed. The dif-
ferent commands are shown in Table 157.
Figure 139. Parallel Programming(1)
+5V
RDY/BSY
OE
PD1
PD2
PD3
PD4
PD5
PD6
PD7
VCC
+5V
WR
AVCC
BS1
PB7 - PB0
DATA
XA0
XA1
PAGEL
+12 V
BS2
RESET
PA0
XTAL1
GND
Note:
1. Unused Pins should be left floating.
Table 153. Pin Name Mapping
Signal Name in
Programming Mode Pin Name
I/O
Function
0: Device is busy programming, 1: Device is
ready for new command.
RDY/BSY
PD1
O
OE
WR
PD2
PD3
PD4
PD5
PD6
PD7
PA0
I
Output Enable (Active low).
Write Pulse (Active low).
Byte Select 1.
I
BS1
I
XA0
I
XTAL Action Bit 0
XA1
I
I
XTAL Action Bit 1
PAGEL
BS2
Program Memory and EEPROM data Page Load.
Byte Select 2.
I
DATA
PB7-0
I/O
Bi-directional Data bus (Output when OE is low).
Table 154. BS2 and BS1 Encoding
Flash /
EEPROM
Address
Low Byte
High Byte
Flash Data
Loading /
Reading
Fuse
Programming
Reading Fuse
and Lock Bits
BS2
BS1
0
0
1
0
1
0
Low Byte
High Byte
Reserved
Low Byte
Fuse Low Byte
Lockbits
High Byte
Extended High
Byte
Extended Byte
Extended Fuse
Byte
1
1
Reserved
Reserved
Reserved
Fuse High Byte
339
2549A–AVR–03/05
ATMEL [ ATMEL ]
