ATmega640/1280/1281/2560/2561
Memory
Programming
Program And Data
Memory Lock Bits
The ATmega640/1280/1281/2560/2561 provides six Lock bits which can be left unpro-
grammed (“1”) or can be programmed (“0”) to obtain the additional features listed in
Table 149. The Lock bits can only be erased to “1” with the Chip Erase command.
Table 148. Lock Bit Byte(1)
Lock Bit Byte
Bit No
Description
–
Default Value
7
6
5
4
3
2
1
0
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
–
BLB12
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
BLB11
BLB02
BLB01
LB2
LB1
Lock bit
Note:
Table 149. Lock Bit Protection Modes(1)(2)
Memory Lock Bits Protection Type
1. “1” means unprogrammed, “0” means programmed
LB Mode
LB2
LB1
1
1
1
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.(1)
2
1
0
0
0
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.(1)
3
BLB0 Mode BLB02 BLB01
No restrictions for SPM or (E)LPM accessing the
Application section.
1
2
1
1
1
0
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
3
4
0
0
0
1
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
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2549A–AVR–03/05