.
Table 79. Compare Output Mode, non-PWM
COMnA1/COMnB1/
COMnC1
COMnA0/COMnB0/
COMnC0
Description
0
0
1
1
0
1
0
1
Normal port operation, OCnA/OCnB/OCnC
disconnected.
Toggle OCnA/OCnB/OCnC on compare
match.
Clear OCnA/OCnB/OCnC on compare
match (set output to low level).
Set OCnA/OCnB/OCnC on compare match
(set output to high level).
Table 80 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the
fast PWM mode.
Table 80. Compare Output Mode, Fast PWM
COMnA1/COMnB1/
COMnC0
COMnA0/COMnB0/
COMnC0
Description
0
0
Normal port operation, OCnA/OCnB/OCnC
disconnected.
0
1
WGM13:0 = 14 or 15: Toggle OC1A on
Compare Match, OC1B and OC1C
disconnected (normal port operation). For all
other WGM1 settings, normal port operation,
OC1A/OC1B/OC1C disconnected.
1
1
0
1
Clear OCnA/OCnB/OCnC on compare
match, set OCnA/OCnB/OCnC at TOP
Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at TOP
Note:
A
special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the
set or clear is done at TOP. See “Fast PWM Mode” on page 148. for more details.
Table 81 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the
phase correct and frequency correct PWM mode.
158
ATmega640/1280/1281/2560/2561
2549A–AVR–03/05
ATMEL [ ATMEL ]
