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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
16.11.5 OCR1AH and OCR1AL – Output Compare Register 1 A  
Bit  
7
6
5
4
3
2
1
0
(0x89)  
OCR1A[15:8]  
OCR1A[7:0]  
OCR1AH  
OCR1AL  
(0x88)  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R/W  
0
R/W  
R/W  
R/W  
0
R/W  
0
R/W  
0
0
0
16.11.6 OCR1BH and OCR1BL – Output Compare Register 1 B  
Bit  
7
6
5
4
3
2
1
0
(0x8B)  
OCR1B[15:8]  
OCR1B[7:0]  
OCR1BH  
OCR1BL  
(0x8A)  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R/W  
0
R/W  
R/W  
R/W  
0
R/W  
0
R/W  
0
0
0
16.11.7 OCR1CH and OCR1CL – Output Compare Register 1 C  
Bit  
7
6
5
4
3
2
1
0
(0x8D)  
OCR1C[15:8]  
OCR1C[7:0]  
OCR1CH  
OCR1CL  
(0x8C)  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R/W  
0
R/W  
R/W  
R/W  
0
R/W  
0
R/W  
0
0
0
The Output Compare Registers contain a 16-bit value that is continuously compared with the  
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to  
generate a waveform output on the OCnx pin.  
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are  
written simultaneously when the CPU writes to these registers, the access is performed using an  
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other  
16-bit registers. See “Accessing 16-bit Registers” on page 110.  
16.11.8 ICR1H and ICR1L – Input Capture Register 1  
Bit  
7
6
5
4
3
2
1
0
(0x87)  
ICR1[15:8]  
ICR1[7:0]  
ICR1H  
ICR1L  
(0x86)  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
IThe Input Capture is updated with the counter (TCNTn) value each time an event occurs on the  
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture  
can be used for defining the counter TOP value.  
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read  
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit  
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit  
registers. See “Accessing 16-bit Registers” on page 110.  
16.11.9 TIMSK1 – Timer/Counter1 Interrupt Mask Register  
Bit  
(0x6F)  
7
6
5
4
3
OCIE1C  
R/W  
0
2
OCIE1B  
R/W  
0
1
OCIE1A  
R/W  
0
0
TOIE1  
R/W  
0
ICIE1  
TIMSK1  
Read/Write  
Initial Value  
R
0
R
0
R/W  
0
R
0
135  
7799D–AVR–11/10  
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