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ATMEGA128L-8AL 参数 Datasheet PDF下载

ATMEGA128L-8AL图片预览
型号: ATMEGA128L-8AL
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 8MHz, CMOS, PQFP64, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026AEB, TQFP-64]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 391 页 / 6192 K
品牌: ATMEL [ ATMEL ]
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AVR  
ATmega128  
Memories  
This section describes the different memories in the ATmega128. The AVR architecture has two  
main memory spaces, the Data Memory and the Program Memory space. In addition, the  
ATmega128 features an EEPROM Memory for data storage. All three memory spaces are linear  
and regular.  
In-System  
The ATmega128 contains 128K bytes On-chip In-System Reprogrammable Flash memory for  
program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as  
64K x 16. For software security, the Flash Program memory space is divided into two sections,  
Boot Program section and Application Program section.  
Reprogrammable  
Flash Program  
Memory  
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega128  
Program Counter (PC) is 16 bits wide, thus addressing the 64K program memory locations. The  
operation of Boot Program section and associated Boot Lock bits for software protection are  
described in detail in “Boot Loader Support – Read-While-Write Self-Programming” on page  
273. “Memory Programming” on page 286 contains a detailed description on Flash programming  
in SPI, JTAG, or Parallel Programming mode.  
Constant tables can be allocated within the entire program memory address space (see the LPM  
– Load Program Memory and ELPM – Extended Load Program Memory instruction description).  
Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-  
ing” on page 14.  
Figure 8. Program Memory Map  
Program Memory  
$0000  
Application Flash Section  
Boot Flash Section  
$FFFF  
18  
ATmega128(L)  
2467P–AVR–08/07  
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