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ATMEGA128L-8AL 参数 Datasheet PDF下载

ATMEGA128L-8AL图片预览
型号: ATMEGA128L-8AL
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 8MHz, CMOS, PQFP64, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026AEB, TQFP-64]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 391 页 / 6192 K
品牌: ATMEL [ ATMEL ]
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ATmega128(L)  
When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-  
cuted before any pending interrupts, as shown in this example.  
Assembly Code Example  
sei ; set global interrupt enable  
sleep; enter sleep, waiting for interrupt  
; note: will enter sleep before any pending  
; interrupt(s)  
C Code Example  
__enable_interrupt(); /* set global interrupt enable */  
__sleep(); /* enter sleep, waiting for interrupt */  
/* note: will enter sleep before any pending interrupt(s) */  
Interrupt Response  
Time  
The interrupt execution response for all the enabled AVR interrupts is four clock cycles mini-  
mum. After four clock cycles, the program vector address for the actual interrupt handling routine  
is executed. During this 4-clock cycle period, the Program Counter is pushed onto the Stack.  
The vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If  
an interrupt occurs during execution of a multi-cycle instruction, this instruction is completed  
before the interrupt is served. If an interrupt occurs when the MCU is in Sleep mode, the inter-  
rupt execution response time is increased by four clock cycles. This increase comes in addition  
to the start-up time from the selected sleep mode.  
A return from an interrupt handling routine takes four clock cycles. During these 4-clock cycles,  
the Program Counter (two bytes) is popped back from the Stack, the Stack Pointer is incre-  
mented by two, and the I-bit in SREG is set.  
17  
2467P–AVR–08/07  
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