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ATMEGA2560-16AU-SL383 参数 Datasheet PDF下载

ATMEGA2560-16AU-SL383图片预览
型号: ATMEGA2560-16AU-SL383
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, MS-026AED, TQFP-100]
分类和应用: 时钟微控制器
文件页数/大小: 448 页 / 7518 K
品牌: ATMEL [ ATMEL ]
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8.4  
I/O Memory  
The I/O space definition of the ATmega640/1280/1281/2560/2561 is shown in “Register Sum-  
mary” on page 414.  
All ATmega640/1280/1281/2560/2561 I/Os and peripherals are placed in the I/O space. All I/O  
locations may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data  
between the 32 general purpose working registers and the I/O space. I/O Registers within the  
address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In  
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.  
Refer to the instruction set section for more details. When using the I/O specific commands IN  
and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data  
space using LD and ST instructions, 0x20 must be added to these addresses. The  
ATmega640/1280/1281/2560/2561 is a complex microcontroller with more peripheral units than  
can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For  
the Extended I/O space from 0x60 - 0x1FF in SRAM, only the ST/STS/STD and LD/LDS/LDD  
instructions can be used.  
For compatibility with future devices, reserved bits should be written to zero if accessed.  
Reserved I/O memory addresses should never be written.  
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most  
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore  
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-  
isters 0x00 to 0x1F only.  
The I/O and peripherals control registers are explained in later sections.  
8.4.1  
General Purpose I/O Registers  
The ATmega640/1280/1281/2560/2561 contains three General Purpose I/O Registers. These  
registers can be used for storing any information, and they are particularly useful for storing glo-  
bal variables and Status Flags. General Purpose I/O Registers within the address range 0x00 -  
0x1F are directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions. See “Register  
Description” on page 34.  
26  
ATmega640/1280/1281/2560/2561  
2549L–AVR–08/07  
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