AT90PWM2/3/2B/3B
Receiver will generate a parity value for the incoming data and compare it to the UPM setting. If
a mismatch is detected, the UPE Flag in UCSRA will be set.
Table 18-5. UPM Bits Settings
UPM1
UPM0
Parity Mode
0
0
1
1
0
1
0
1
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
This setting is available in EUSART mode only when data bits are level encoded (in Manchester
the parity checker and generator are not available).
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
In EUSART mode, the USBS bit has the same behavior and the EUSB bit of the EUSART allows
to configure the number of stop bit for the receiver in this mode.
Table 18-6. USBS Bit Settings
USBS
Stop Bit(s)
1-bit
0
1
2-bit
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits (Char-
acter SiZe) in a frame the Receiver and Transmitter use.
Table 18-7. UCSZ Bits Settings
UCSZ2
UCSZ1
UCSZ0
Character Size
5-bit
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
When the EUSART mode is set, these bits have no effect.
• Bit 0 – UCPOL: Clock Polarity
205
4317J–AVR–08/10
ATMEL [ ATMEL ]
