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AT90PWM3B-16SU 参数 Datasheet PDF下载

AT90PWM3B-16SU图片预览
型号: AT90PWM3B-16SU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有8K字节的系统内可编程闪存 [8-bit Microcontroller with 8K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 361 页 / 6022 K
品牌: ATMEL [ ATMEL ]
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AT90PWM2/3/2B/3B  
TABLE 4.  
Assembly Code Example(1)(2)  
USART_Transmit:  
; Wait for empty transmit buffer  
sbis UCSRA,UDRE  
rjmp USART_Transmit  
; Copy 9th bit from r17 to TXB80  
cbi UCSRB,TXB80  
sbrc r17,0  
sbi UCSRB,TXB80  
; Put LSB data (r16) into buffer, sends the data  
sts UDR,r16  
ret  
C Code Example(1)(2)  
void USART_Transmit( unsigned int data )  
{
/* Wait for empty transmit buffer */  
while ( !( UCSRA & (1<<UDRE))) )  
;
/* Copy 9th bit to TXB8 */  
UCSRB &= ~(1<<TXB80);  
if ( data & 0x0100 )  
UCSRB |= (1<<TXB80);  
/* Put data into buffer, sends the data */  
UDR = data;  
}
Notes: 1. These transmit functions are written to be general functions. They can be optimized if the con-  
tents of the UCSRB is static. For example, only the TXB80 bit of the UCSRB0 Register is used  
after initialization.  
2. The example code assumes that the part specific header file is included.  
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”  
instructions must be replaced with instructions that allow access to extended I/O. Typically  
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.  
The ninth bit can be used for indicating an address frame when using multi processor communi-  
cation mode or for other protocol handling as for example synchronization.  
18.6.3  
Transmitter Flags and Interrupts  
The USART Transmitter has two flags that indicate its state: USART Data Register Empty  
(UDRE) and Transmit Complete (TXC). Both flags can be used for generating interrupts.  
The Data Register Empty (UDRE) flag indicates whether the transmit buffer is ready to receive  
new data. This bit is set when the transmit buffer is empty, and cleared when the transmit buffer  
contains data to be transmitted that has not yet been moved into the Shift Register. For compat-  
ibility with future devices, always write this bit to zero when writing the UCSRA Register.  
When the Data Register Empty Interrupt Enable (UDRIE) bit in UCSRB is written to one, the  
USART Data Register Empty Interrupt will be executed as long as UDRE is set (provided that  
191  
4317J–AVR–08/10  
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