16.9 PSC Input Mode 1: Stop signal, Jump to Opposite Dead-Time and Wait
Figure 16-20. PSCn behaviour versus PSCn Input A in Fault Mode 1
DT0 OT0
DT1 OT1
DT0 OT0
DT1 OT1
DT0 OT0
DT1 OT1
PSCOUTn0
PSCOUTn1
PSC Input A
PSC Input B
PSC Input A is taken into account during DT0 and OT0 only. It has no effect during DT1 and
OT1.
When PSC Input A event occurs, PSC releases PSCOUTn0, waits for PSC Input A inactive state
and then jumps and executes DT1 plus OT1.
Figure 16-21. PSCn behaviour versus PSCn Input B in Fault Mode 1
DT0 OT0
DT1 OT1
DT0 OT0
DT1 OT1
DT0 OT0
DT1 OT1
PSCOUTn0
PSCOUTn1
PSC Input A
PSC Input B
PSC Input B is take into account during DT1 and OT1 only. It has no effect during DT0 and OT0.
When PSC Input B event occurs, PSC releases PSCOUTn1, waits for PSC Input B inactive state
and then jumps and executes DT0 plus OT0.
148
AT90PWM2/3/2B/3B
4317J–AVR–08/10
ATMEL [ ATMEL ]
